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Design and develop automated test software and hardware for mission-critical electronic warfare systems, integrating NI Test Stand and RF measurement tools in a production environment.
Engineer I – Focal Plane Electronics Systems Location: Boulder, Colorado, United States Category: Engineering & Technology Employment Type: Full-Time Job Description We are seeking an early‑career Focal Plane…
Develops automated test software and hardware integration solutions for defense electronics, focusing on RF/microwave testing, troubleshooting, and production validation in a government/defense environment.
Design and develop secure hardware IPs like post-quantum crypto accelerators and random number generators using Verilog/VHDL and ASIC flows.
Design and implement Verilog RTL for SoC blocks, integrate IPs, and optimize performance through synthesis, timing closure, and power reduction in a semiconductor R&D team.
Designs and debugs FPGA firmware for X-ray detector systems, integrating hardware and optimizing high-speed interfaces like Gigabit Ethernet and PCIe.
Design and integrate secure ASIC subsystems to protect Apple’s SoCs from side-channel attacks and ensure data integrity using RTL, UPF, and cryptographic engines.
Lead verification of Cisco’s cutting-edge data-center ASICs, building DV environments, writing test plans, and ensuring full coverage with Verilog/SystemVerilog/UVM while collaborating with designers and software teams.
Designs and runs SystemVerilog/UVM testbenches to verify Arm-based CPUs, PCIe, DDR, and SoC subsystems, writing C/C++/Assembly tests and debugging RTL issues.
Designs and verifies high-performance FPGA and SoC solutions in VHDL/Verilog, integrating IP and optimizing timing for mission-critical applications.
Principal FPGA Engineer designing next-gen surgical camera tech using VHDL/Verilog, C/C++, and Python while leading a team and interfacing with hardware sensors and DDR memories.
Lead FPGA design and image-processing pipelines for next-gen surgical cameras, writing VHDL/Verilog, C firmware, and test scripts while mentoring junior engineers.
Designs IO pad rings, bump patterns, and connectivity for advanced SoC storage/memory controllers using EDA tools and scripting.
Principal Digital Design Engineer designing secure embedded controllers and cryptographic hardware for automotive, industrial, and defense markets using ASIC/FPGA flows, Verilog/VHDL, and security countermeasures.
We are now looking for an ASIC Top Floorplan Design Engineer. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoC's and GPU's. This position offers you a unique…
Design and implement high-performance CPU frontend features for RISC-V cores using Chisel/Verilog, focusing on instruction fetch, decode, and branch prediction while collaborating with verification and physical design teams.
Lead a team designing CPLD/FPGA logic for server and storage products using Verilog/VHDL, I2C, SPI, and validation flows.
Designs and validates high-speed analog and mixed-signal IP blocks (PLLs, ADCs, DACs, filters) for multi-GHz timing products using Cadence tools and Verilog-A modeling.
Designs and optimizes DFT strategies, test sequences, and firmware for NAND flash memory, using Verilog/XA simulations and collaborating with cross-functional teams.
Обязанности: Разработка и отладка проектов для ПЛИС. Документирование разработанных проектов. Требования: Высшее (техническое) образование, предпочтительно-в области радиотехники. Опыт работы от 3-х лет в разработке и…
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