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Senior engineer verifying complex processor designs using SystemVerilog/UVM, formal tools, and coverage-driven flows to ensure functional correctness of Network-on-Chip IPs and SoCs.
Leads end-to-end validation of AI and hyperscale server platforms, coordinating electrical, firmware, and system-level tests to ensure product readiness and compliance.
Design next-generation Adaptive SoCs, balancing compute, memory, AI, and high-speed I/O while optimizing power, signal integrity, and package-board co-design.
Verify and validate AMD’s next-gen GPU and SoC designs using SystemVerilog/UVM, emulation platforms, and formal methods to ensure silicon meets performance, power, and functional specs.
Lead end-to-end validation of AI and hyperscale server platforms, coordinating electrical, firmware, and system-level testing across board, system, and rack levels.
Lead ROCm software validation for AMD Instinct GPUs, defining test architecture, CI/CD pipelines, and release gates for AI/ML and HPC workloads across multi-node systems.
Develop embedded C/C++ software and Linux platform support for AMD Adaptive SoCs and Ryzen AI Embedded processors, building computer vision, graphics, and edge AI pipelines for robotics and industrial automation.
Build and optimize the Triton compiler and runtime for AMD GPUs to enable scalable, distributed AI workloads across multi-GPU systems.
Lead a team to architect and deliver embedded software stacks for automotive high-performance computing platforms using Linux/QNX/Android, focusing on real-time and application cores.
Designs digital IP blocks and SoCs for automotive systems, writing RTL in Verilog/VHDL and collaborating with verification, physical implementation, and validation teams.
Senior role defining and governing the hardware architecture for Ford’s in-vehicle infotainment ECUs, including power delivery, processing, memory, storage, and high-speed interfaces, with hands-on validation and supplier leadership.
Senior role defining and governing the hardware architecture for Ford’s in-vehicle infotainment ECUs, including power delivery, processing, memory, storage, and high-speed interfaces, with hands-on lab work and cross-functional sign-off.
Senior Hardware Technician builds, configures, and tests Oracle server hardware in a lab, performing PCB rework, system bring-up, and validation while maintaining lab readiness and collaborating with engineers.
Builds backend services for an automated-driving platform that integrates with Ford vehicles, focusing on L3 autonomy features.
Lead hardware design and engineering for trading infrastructure, optimizing servers and racks for performance, cooling, and reliability in a high-frequency trading environment.
Lead the design of Cerebras' next-generation AI chips, focusing on high-performance RTL development and integration while collaborating with cross-functional teams and external ASIC vendors.
Designs firmware architectures for next-gen SSDs, leading cross-functional teams to implement storage interfaces like NVMe and PCIe while optimizing performance, reliability, and power constraints in C/C++.
Staff Electrical and Electronic Design Engineer - Future Forward Location: Sunnyvale, CA, us Company Description It started with a simple idea: what if surgery could be less invasive and recovery less painful? Nearly…
Manager, ASIC DV Location: Hyderabad - Phoenix Aquila, India Time Type: Full time Job Description Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader…
Staff SSD Systems Design Engineer Location: Longmont-MAX- Office, CO Time Type: Full time Job Description Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world…
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