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Own verification of custom AI accelerator hardware for matrix/vector compute engines, ensuring numerical correctness and performance under LLM workloads using SystemVerilog/UVM and reference models.
Designs and executes verification plans for a custom Physical AI SoC’s CPU, ensuring correctness, performance, and reliability of microarchitecture components (fetch/decode/cache) via SystemVerilog/UVM/C++ testbenches and real-world workload testing.
Die Dockweiler AG zählt zu den bekannten und verlässlichen Arbeitgebern in Mecklenburg-Vorpommern. Durch unsere internationalen Aktivitäten bieten wir einen interessanten und abwechslungsreichen Arbeitsplatz mit guten…
#WeAreIn for jobs that impact everyone's life. Build the future nobody’s dreamed of yet... are you ready to rethink the impossible? As a Staff Digital Design Engineer in our Research & Development team,…
Designs and executes verification testbenches for memory interface chips using System Verilog and UVM to ensure 100% coverage before tape-out.
The Senior SoC Design Verification Engineer leads the verification of complex SoC features and subsystems using SystemVerilog and UVM. The role involves driving verification methodology, ensuring silicon sign-off, and mentoring engineering teams.
About Ethernovia, Inc. Ethernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and autonomous vehicles, robotics and other intelligent machines. Founded in 2018,…
Designs and runs RTL validation for Intel’s IP blocks, using System Verilog and UVM to verify DDR5/LPDDR5 and debug failures before tape-out.
NVIDIA is seeking interns for a 12-week hardware verification program to work on projects involving GPU and processor architecture, functional testing, and digital design. Interns will utilize tools like SystemVerilog, UVM, and various simulation environments to support hardware validation efforts.
NVIDIA is seeking interns for 12-week hardware ASIC design roles, focusing on tasks like RTL design, verification, and physical design. Interns will work on projects impacting AI, robotics, and accelerated computing using tools like SystemVerilog, C++, and Python.
Designs and verifies FPGA logic for Microchip PolarFire SoCs using VHDL/Verilog, integrating with RISC-V cores and Linux/RTOS drivers.
Alexianer IT GmbH Die Alexianer IT GmbH ist das Dienstleistungsunternehmen der Alexianer GmbH für die Informationstechnologie. Sie unterstützt bundesweit Alexianer-Einrichtungen im Verbund mit einer Vielzahl an…
Role Overview We are seeking a highly experienced Design Verification Leader to lead the definition and execution of scalable, reusable, and high-quality verification strategies for next-generation SoCs targeting AI,…
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a…
ASIC Design Verification Engineer responsible for owning verification strategy, coverage closure, and system-level testing for AMD’s mixed-signal power management IP, including RTL design and collaboration with analog/firmware teams.
Design and execute verification plans for a Physical AI SoC using SystemVerilog/UVM, C/C++, assertions, and emulation to validate compute engines, memory, and interconnects.
Join Bitdeer's IC development team to ensure the functional correctness and performance of computer arithmetic IPs. Develop comprehensive verification environments, execute test plans, debug RTL issues, and…
Für unseren Standort in Bonn suchen wir ab sofort eine:n Customer Service Manager (m/w/d) SIE WISSEN VIEL UND MÖCHTEN AM LIEBSTEN ALLES ANWENDEN? WIR BIETEN GROSSARTIGE CHANCEN FÜR LÖSUNGSFINDER. Willkommen im…
Senior ASIC verification engineerThis role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company…
Lead a team to architect and execute advanced verification strategies for next-gen semiconductor products using SystemVerilog, UVM, and emulation platforms.
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