Tech jobs

Open 27d EuropeFull-timeSenior

(Senior) Development Engineer: Digital Semicustom Design (m/f/d)

Germany

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…

AI Rtl Verilog VHDL

Synopsys

AI Automation Ethernet Express.js PCIe +6 skills

ASIC Digital Design, Staff Engineer - 18954

Open 21d Staff

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…

Synopsys

AI Ethernet Networking PCIe Risk Assessment +4 skills

ASIC Digital Design, Manager - 18957

Open 20d

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…

RTX

On-siteNorth AmericaFull-timeSenior

Senior Electrical Engineer - FPGA (Onsite)

C++ Ethernet FPGA I2c Itar +11 skills

Date Posted: 2026-09-28

 Country: United States of America

 Location: US-FL-MELBOURNE-313 ~ 1344 S Babcock St ~ BLDG 313

 Position Role Type: Onsite

 U.S. Citizen, U.S. Person, or…

Qualcomm

On-siteEurope H-1B sponsor history

Security Design Engineer - Cork, IRL

Ireland

Company: QT Technologies Ireland Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Join Qualcomm Ireland’s Security team and be at the forefront of innovation in digital…

Agentic AI AI Asic Penetration Testing REST Assured +3 skills

松翰科技股份有限公司

Bash Perl Python Tcl Verilog

Design Flow CAD工程師

APACFull-time

Taiwan

‧ Familiar with scripting/programming language (TCL / C shell / Perl / Python/ …) ‧ Familiar with IC design flow ‧ Familiar with Verilog & Library characterization ‧ Familiar with EDA tool including Cadence Genus /…

Renesas Electronics

Open 29d HybridNorth AmericaPrincipal

Senior Principal Design Verification Engineer

Agile AI IoT Iso 26262 SystemVerilog +2 skills

Position Overview Renesas is seeking an experienced Principal Verification Engineer to lead the verification efforts for our Automotive PMIC (Power Management Integrated Circuit) product line. This role combines deep…

平头哥-模拟建模高级工程师/专家-成都

MATLAB SerDes Verilog VHDL

1.负责高速模拟/混合信号IP的建模工作，包括但不限于PLL、DLL、CDR、SerDes、ADC/DAC、PHY等模块的行为级/结构级模型开发，支持前仿、后仿及数模混合仿真； 2.构建高精度、可配置、可重用的Behavior model和Leaf Model，用于系统级验证、性能评估和功耗分析，支持VCS/Xcelium等主流仿真工具；…

平头哥-模拟建模高级工程师/专家-上海

MATLAB SerDes Verilog VHDL

1.负责高速模拟/混合信号IP的建模工作，包括但不限于PLL、DLL、CDR、SerDes、ADC/DAC、PHY等模块的行为级/结构级模型开发，支持前仿、后仿及数模混合仿真； 2.构建高精度、可配置、可重用的Behavior model和Leaf Model，用于系统级验证、性能评估和功耗分析，支持VCS/Xcelium等主流仿真工具；…

平头哥-DFT设计/DFT CAD开发高级工程师/专家-北京

Asic CAD Perl Python Rtl +3 skills

The candidate is expected to be responsible for following tasks: Participate in complex Chip DFT/DFD feature and architecture definition Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test…

平头哥-DFT设计/DFT CAD开发高级工程师/专家-深圳

Asic CAD Perl Python Rtl +3 skills

The candidate is expected to be responsible for following tasks: Participate in complex Chip DFT/DFD feature and architecture definition Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test…

Envision Employment Solutions

Perl Python Rtl SystemVerilog Tcl +1 skills

Senior RTL Design Engineer

Open 27d MENASenior

Egypt

Envision Employment Solutions is currently looking for a Senior RTL Design Engineer for one of our partners, an IT Services and IT Consulting company. THE ROLE You'll take a design from architecture to tapeout,…

Envision Employment Solutions

Iso 26262 Rtl Stakeholder Management SystemVerilog Verilog

VLSI Functional Safety Hardware Architect

Open 27d MENA

Egypt

Envision Employment Solutions is currently looking for a VLSI Functional Safety Hardware Architect for one of our partners, an IT Services and IT Consulting company. THE ROLE In automotive silicon, a missed fault isn't…

Epia Neuro

Open 31d On-siteNorth AmericaFull-timePrincipal

Principal Design Engineer, Analog Mixed-Signal (AMS)

Asic Cadence Virtuoso Iso 13485 Linux SOA +2 skills

A senior analog/mixed-signal IC architect who owns the custom ASIC at the heart of an implantable neural-interface device: writing the chip-level design spec, personally designing critical low-noise, ultra-low-power analog blocks, driving verification, and leading tapeout and silicon bring-up. Core tools include Cadence Virtuoso/Spectre, Verilog-A/AMS, and SystemVerilog.

Celestica

FPGA SystemVerilog Verilog

Senior FPGA/CPLD Engineer for High-Performance Data Centers

Open 31d APACSenior

Malaysia

Senior engineer at Celestica in Penang who designs, implements, and validates FPGA/CPLD solutions for data center hardware platforms — defining architecture, writing RTL, running simulations, and validating hardware with hardware and software teams. Core technologies: Verilog/SystemVerilog, FPGA tools, and high-speed serial interfaces.

Advanced Micro Devices, Inc

AI Automation Bash Git Linux +10 skills

Design Verification Infrastructure & Performance Engineer

Open 31d Europe

Romania

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…

Everstar

Ethernet FPGA MATLAB Python Simulink +2 skills

🚀 FPGA Engineer

Open 48d Europe

Ukraine

An FPGA Engineer in Kyiv joins a defense (MilTech) R&D team building electronic hardware for real battlefield use. Day to day: implementing and optimizing digital signal processing (DSP) algorithms on FPGA for navigation and communication signals, using Verilog/SystemVerilog, MATLAB/Simulink, and high-speed interfaces like JESD204 and Ethernet.

Semidynamics

AI Automation Firmware FPGA Git +10 skills

Design Verification Engineer – GLS & Hardware Emulation

HybridEurope

Spain

We are looking for a Design Verification Engineer to support gate-level simulation (GLS) and hardware emulation activities for our AI chip design and verification teams. In this role, you will help ensure silicon…

Castelion Corporation

North AmericaContractSenior

Senior FPGA Engineer