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Every token a large language model generates depends on data reaching the right accelerator at the right moment. As AI models outgrow any single chip, the network between accelerators becomes the bottleneck that…
In this role, you will work with software and hardware engineering groups to define the next-generation inter-chip network architecture for high-performance computing SOC in Data Center Requirement of the Job…
Design and automate mission-critical, high-performance data-center networks for SpaceX’s internal operations and vehicle fleet, using Juniper/Cisco/Arista hardware and AI-driven monitoring.
Infrastructure & performance engineer at a startup building persistent computers for AI agents: profile and speed up builds, tests, and CI/CD, build internal platforms and delivery tooling (Bessemer, Hollywood), and work with in-office hardware. Systems languages (Go/Rust/C++), Linux debugging, Kubernetes; on-site in San Francisco, $120k-$250k.
Senior staff engineer maintaining and extending DDN's S3-compliant high-performance file system: hands-on C/C++ systems development from design through testing and deployment, architecture and troubleshooting of file-system/storage components, research-driven work, and mentoring of junior developers.
Crusoe is on a mission to accelerate the abundance of energy and intelligence . As the only vertically integrated AI infrastructure company built from the ground up, we own and operate each layer of the stack — from…
Senior ASIC RTL design engineer at Cerebras who drives wafer-scale AI chip design from functional spec and microarchitecture through RTL development and synthesis, then debugs silicon during bring-up. Day-to-day involves high-performance RTL, front-end and third-party IP integration, and collaboration across physical design, verification, DFT, and software teams.
1. 企业级 AI Agent 工程落地指导：作为客户 AI 应用技术服务的第一责任人，深入理解客户业务场景与技术痛点，主导Agent等工程全链路落地服务：从 RAG 构建、知识库向量化、Prompt Engineering 调优，到多 Agent 协作编排、工具链集成与 Function Call调试，确保 AI Agent 在生产环境高效运行。 2.…
Onsite Dell server technician in Denton, TX performing hardware repairs, racking/stacking, and break/fix work in a datacenter environment.
In this role, you will work with hardware and software engineering groups to define the next-generation inter-chip network architecture for high-performance AI chip and AI network. Identifies the challenging problems,…
Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at…
Build a brand-new LLM inference platform from scratch in Rust for a seed-stage stealth AI-infrastructure startup: own batching, scheduling, KV cache/prefix caching, request routing, and multi-GPU/multi-node serving, profiling for latency and cost per token. Stack centers on Rust plus Python/PyTorch, vLLM/SGLang/TensorRT-LLM, and CUDA/Triton/NCCL.
Staff engineer on Lambda's Orchestration team building a managed Kubernetes platform for AI workloads on bare metal — driving control plane design, GPU orchestration with NVIDIA's open-source stack (GPU Operator, DCGM, NCCL), and cross-team infrastructure decisions. Core tech: Go, Python, Kubernetes internals, Prometheus/Grafana; onsite 4 days/week in SF, San Jose, or Bellevue.
Lambda, The Superintelligence Cloud, is a leader in AI cloud infrastructure serving tens of thousands of customers. Our customers range from AI researchers to enterprises and hyperscalers. Lambda's mission is to…
About us General Compute is the neocloud for alternative chips. Inference is fragmenting: purpose-built silicon from SambaNova, Cerebras, Positron, d-Matrix, and others already beats GPUs on decode, and we…
Bridges quant research and high-performance computing by accelerating end-to-end ML model training at a quantitative trading firm — benchmarking workloads across GPUs/accelerators, optimizing distributed training, GPU kernels, and training infrastructure. Core stack: Python, C++, PyTorch/JAX, CUDA, NCCL.
● 负责Scale-Up Switch配置与集群管控软件研发，包括交换机自动发现与纳管、拓扑及端口配置、转发策略与QoS下发、状态采集、配置一致性校验、批量升级和故障联动，建设统一、自动化、可观测的超节点管控平台。 ● 负责Scale-Up交换机软件设计、研发与交付，涵盖交换芯片SDK适配、端口与链路管理、转发与路由配置、QoS及拥塞控制、遥测与诊断、高可用和在线升级，保障交换系统高性能、稳定运行。 ● 参与Scale-Up…
负责高性能网络系统的架构设计与技术演进，围绕 RDMA网络、超节点 等核心技术，构建低延迟、高吞吐的网络基础设施，支撑 Agent时代的AI 推理和训练、分布式存储、KV cache等业务场景。作为网络架构师，推动技术选型、方案落地与团队能力建设。 核心职责 主导高性能网络架构的规划与设计，涵盖数据中心网络拓扑、RDMA 网络方案、集合通信优化等方向；…
团队介绍：字节跳动基础设施部门，负责字节跳动的全栈算力基础设施，从芯片服务器产研、到超大规模数据中心，到传统云平台和如今的AI Native
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