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The company's Advanced Research (ARG) team in Yokneam is looking for a Senior Electro-Optical / Board Design Engineer for research and development. The ARG group is doing research and development of next-generation…
Manage a team validating new ASIC/SOC and MCU/processor products through bench testing, silicon bring-up, and characterization for Analog Devices' Digital ASIC unit.
Designs IO pad rings, bump patterns, and connectivity for advanced SoC storage/memory controllers using EDA tools and scripting.
Build and lead embedded C/C++ software for a next-gen satellite network, designing real-time control and data-plane systems for space-based communications hardware.
Lead embedded firmware development for Marvell’s DSP-based optical networking chips, guiding a small team to deliver firmware that controls signal processing, FEC, and thermal monitoring for data-center interconnects.
Hardware Engineer I designs, reviews, and validates Linux-based networking hardware for data-center power systems, ensuring EMC, safety, and regulatory compliance while supporting NPI and certification processes.
At a Glance Legrand has an exciting opportunity for a Hardware Engineer I to join the Data center Power & Control ZPE Systems Team. This position reports to Blumenau - SC Brazil . What Will You Do? Support product…
Validate Apple Watch hardware features on the bench, troubleshoot prototype issues, and automate validation tools to ensure product quality before manufacturing.
Design, debug, and validate high-performance AI compute hardware (GPU/CPU) with focus on PCIe, InfiniBand, and NVMe/storage to ensure reliability and scalability for Crusoe Cloud.
Design, debug, and validate high-performance AI compute hardware (GPU/CPU) and infrastructure, focusing on PCIe, InfiniBand, and NVMe/storage to ensure reliability and scalability for Crusoe Cloud.
Build and optimize the embedded networking stack for next-gen surgical robots, including real-time Ethernet drivers, fault-tolerant protocols, and DDS-based messaging in C/C++ on Linux/RTOS.
Designs and verifies peripheral IP blocks (PCIe, CXL, USB, Ethernet) using SystemVerilog/UVM, coverage-driven random testing, and C-based reference models.
Design verification engineer building UVM testbenches for high-speed interconnects (PCIe, CXL, AXI) to ensure ASIC/subsystem correctness before tape-out.
Design and document high-speed printed wiring boards for advanced 5G products across mobile, automotive, IoT, and infrastructure using tools like Altium Designer or Cadence Allegro.
PCIe / CXL Validation Engineer - Sr. Staff Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group >…
Develop and maintain emulation models and infrastructure for Google’s custom silicon, scripting automation and debugging hardware flows to accelerate product development.
Job Description Sophia Space is developing the Tile avionics platform that powers our orbital computing architecture. We are seeking a Staff / Principal Avionics Hardware Engineer to provide senior technical leadership…
Lead a team designing custom silicon and SoCs for Google’s AI and cloud infrastructure, overseeing RTL coding, simulations, and physical design to deliver high-performance hardware.
Designs and validates post-silicon diagnostics software for server platforms, focusing on hardware-software integration and RAS validation across x86 systems.
Design verification engineer building and debugging SystemVerilog/UVM testbenches for custom AI silicon IP and SoCs, ensuring functionally correct RTL before tape-out.
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