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Designs and implements FPGA/ASIC hardware for satellite-based 5G base stations, focusing on signal processing and power efficiency using Verilog/SystemVerilog and EDA tools.
Lead the design and integration of system-on-chip (SoC) logic and features using Verilog RTL, focusing on power, clock/reset domains, and interconnect protocols like AXI and PCIe.
Mission: We are looking for an engineer with strong technical foundations — mathematics, electromagnetism, digital signal processing (DSP), and programming — to join our SAR (Synthetic Aperture Radar) systems team. No…
Designs and optimizes high-performance FPGA hardware for financial trading systems, using Verilog/SystemVerilog and modern FPGA toolchains, with a focus on low-latency interfaces like 100GbE and PCIe.
Design engineer for MIPS S8200 AI CPU processor family: microarchitecture and verification. AI CPU Design Engineer About MIPS @ GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing…
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
Job Details: Job Description: About Altera At Altera™, our independence as the world’s largest pure ‑ play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than…
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Senior engineer automating and maintaining hardware emulation tools (Cadence Palladium, Xilinx, ARM) to validate implantable cardiac devices and speed up Medtronic’s design flows.
Design and verify integrated circuits for AR display systems, building UVM-based testbenches and using Siemens Questa for simulation and debug.
Design and develop high-performance embedded GPS receivers for aviation, managing circuit cards and FPGAs from concept to production while ensuring aviation-grade reliability.
Lead a team of engineers to design and ship complex C++ features for Jasper, Cadence’s formal verification platform, while mentoring junior developers.
Principal IC Digital Design Engineer leads SoC micro-architecture, RTL development, and HW/SW co-design for advanced semiconductor solutions used in AI, cloud, and telecom.
Designs and implements FPGA logic for optical telecommunication products, collaborating with hardware and firmware teams to validate and optimize high-speed data transmission systems using Verilog/SystemVerilog and AMD/Xilinx or Altera tools.
Lead a team building EDA software in C/C++/TCL on Linux, focusing on semiconductor device simulation and analysis flows like SPICE, timing, and power.
Designs and leads the development of high-performance microcontrollers for edge AI applications, using Verilog/SystemVerilog, synthesis, and verification tools.
Designs and validates high-performance ASIC chips for Cisco's networking solutions using Verilog/SystemVerilog, CDC, lint, and formal verification, from architecture through tape-out and lab validation.
Designs and develops embedded hardware and firmware for precision scientific instruments, microscopes, and imaging systems using C/C++, Altium, and ARM Cortex processors.
Design and implement hardware components for AWS Graviton processors using Verilog, collaborating across teams to define architecture and ensure chip reliability for cloud workloads.
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