Tech jobs

NewBe an early applicant North AmericaFull-timePrincipal

Senior Principal FPGA Verification Engineer - $30K Sign-On Bonus

Cybersecurity Embedded Systems Ethernet FPGA Image Processing +6 skills

Job Description Minimum $30,000 Sign On Bonus being offered for external hires. BAE Systems is expanding our expertise to provide exciting and challenging solutions to our customers. Our spacecraft solutions team works…

NewBe an early applicant North AmericaFull-timePrincipal

Principal Electrical Engineer

Assembly Ethernet I2c Oscilloscope Pcb +6 skills

Job Description We are seeking a mid-career Electrical Engineer to support our Electronic Attack Systems and related technologies. If selected, you will be part of the Hardware Team supporting development programs in…

NewBe an early applicant North AmericaContractPrincipal

Senior Principal FPGA Design Engineer

Asic Bash FPGA Git PCIe +7 skills

Job Description BAE Systems is seeking a Senior Principal FPGA Design Engineer! See what you’re missing. Our employees work on the world’s most advanced electronics – from detecting threats for F-35 pilots to…

NewBe an early applicant HybridNorth AmericaFull-timeSenior

FAST Lab – Senior FPGA Engineer

C++ Embedded Systems Ethernet FPGA Git +12 skills

Job Description Be a part of something bigger. At BAE Systems’ FAST Labs, you’ll develop cutting-edge electronics that directly impact national security – from enhancing situational awareness for pilots to enabling…

NewBe an early applicant North America, UKContractSenior

Senior FPGA Design Engineer

Job Description BAE Systems is seeking a Senior FPGA Design Engineer! See what you’re missing. Our employees work on the world’s most advanced electronics – from detecting threats for F-35 pilots to illuminating the…

Asic Bash FPGA Git PCIe +7 skills

NewBe an early applicant North AmericaFull-timeSenior

FPGA Design Senior Engineer

C CI/CD C++ Firmware FPGA +15 skills

Job Description Be part of a new age where firmware and digital design shape technological advantages on the battlefield. Help empower pilots, soldiers, and operators by developing mission‑critical systems that deliver…

NewBe an early applicant North AmericaContractPrincipal

Senior Principal FPGA Design Engineer

FPGA Git Linux MATLAB Signal Processing +3 skills

Job Description See what you’re missing. Our employees work on the world’s most advanced electronics – from detecting threats for F-35 pilots to illuminating the night for soldiers. Spanning air, land, sea, and space,…

NewBe an early applicant North AmericaFull-timeMiddle

Engineer II - FPGA Verification

Cybersecurity Embedded Systems Ethernet FPGA Image Processing +6 skills

Job Description BAE Systems Space & Mission Systems (SMS) is expanding our expertise to provide exciting and challenging solutions to our customers. Our spacecraft solutions team works in a fast paced, highly…

Microsoft

Open 79d On-siteAPACPrincipal

Design Verification Engineer- Senior / Principal

India

Design verification engineer to validate custom silicon for AI hardware, writing test plans and debugging RTL in UVM/C++ for complex SoCs.

Azure Cloud C++ Perl Python +2 skills

RTL Methodology Silicon Design Engineer

Agentic AI AI Automation Bash C# +11 skills

Builds and owns the RTL design methodology, tooling, and AI-powered capabilities for AMD's next-generation CPU core in Austin, TX. Day to day: maintaining linting/static-analysis flows and HDL parsers/AST tooling, and developing LLM-based assistants and agentic workflows to accelerate RTL design, review, and debug.

156K – 223K $

GPU Design Verification Engineer

Agentic AI AI Asic Automation Bash +11 skills

Canada

Design verification engineer on AMD's GPU verification team, driving functional and performance closure on digital design blocks within the Graphics Core IP. Day-to-day work centers on UVM testbenches, coverage plans, test suites, root-cause debugging, plus AI-driven verification automation, using SystemVerilog, Verilog, C/C++ and scripting tools.

112K – 160K CAD

NewBe an early applicant EuropeStaff

Senior Staff Silicon Design Engineer

Ireland

An SMTS-level analog circuit design engineer on AMD's Ireland SerDes team, designing and verifying high-speed analog circuits (ADC/DAC, equalizers, clocking, drivers) for 200+Gbps SerDes on advanced CMOS FinFET nodes, supporting connectivity for AMD CPU, GPU, and FPGA products.

AI Cmos FPGA GPU SerDes +1 skills

73K – 104K €

NewBe an early applicant EuropeStaff

Staff Silicon Design Engineer

Serbia

AMD is hiring a Staff Silicon Design Engineer in Belgrade to define and execute hardware emulation test plans: building emulation testbenches, debugging with design and verification teams, and bringing up standard interfaces. Core technologies include SystemVerilog/Verilog, UVM, C/C++, FPGA flows, and AMBA/PCIe/CXL protocols.

AI C++ FPGA I2c JTAG +7 skills

5.0M – 7.1M RSD

CPU Cache Architect

Experienced design engineer on AMD's Cores Organization developing next-generation CPU core and cache microarchitecture — building cycle-accurate performance simulators, analyzing workloads, and evaluating improvements via emulation and post-silicon experiments. Key tech: C++, scripting, Verilog/RTL, computer architecture.

ASIC Design Engineer, PCIe IP Enablement

AI Asic Automation CAD Express.js +3 skills

At AMD in Markham, ON, this engineer integrates and implements AMD's PCIe subsystem IP into SoCs, owning digital IP from architecture through tape-out. Day-to-day work spans RTL design, synthesis, timing/lint/CDC closure, UPF-based low-power flows, and scripting for flow automation.

112K – 160K CAD

CPU Core RTL Design Engineer

AI Python Rtl SystemVerilog Tcl +1 skills

Design and optimize RTL for next-generation high-performance CPU cores in AMD's central core RTL team, working on pipeline logic and microarchitecture across client, server, and AI platforms. Core tech: Verilog/SystemVerilog, out-of-order CPU design, timing/power optimization, synthesis, and Python/Tcl scripting.

127K – 181K $

NewBe an early applicant North AmericaSenior

RTL Design Engineer

Designs block-level RTL and integrates embedded microprocessor subsystems and hardware accelerators (security, cryptography, compression, DMA, power management) on AMD's Security IP team, supporting client, server, graphics, and gaming SoCs. Daily work centers on Verilog/SystemVerilog design, debugging regressions, and ASIC signoff flows.

AI Asic CAD Cryptography FPGA +8 skills

112K – 160K CAD

NewBe an early applicant APAC

Silicon Design Engineer

Singapore

Silicon Design Engineer on AMD's FPGA Product Development Silicon Integration team in Singapore, integrating RTL components into next-generation FPGA and programmable SoC products — building full-chip RTL connectivity models, verifying them against architectural intent, and developing internal tooling. Core stack: Verilog/SystemVerilog, SoC/ASIC design flows, and CAD tools like VCS, Verdi, and Pri

AI Asic Bash CAD FPGA +7 skills

50K – 72K SGD

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