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Define and evolve the onboard High Performance Compute (HPC) platform architecture for spacecraft, integrating FPGA, GPU, CPU, and networking to meet mission needs while ensuring modularity and reusability across missions.
Intern on the AirPods hardware team, prototyping, debugging, and validating tiny audio electronics from design to factory builds.
Senior Software Engineer designing and maintaining data-processing platforms, APIs, and automation tools for government cyber operations using Python/JavaScript and Linux.
Principal engineer leads a small team designing high-performance FPGA/ASIC Front Haul Gateway solutions for cellular infrastructure radios, using Verilog, SystemVerilog, and AMD Vivado tooling.
Build and run hybrid-cloud and on-premises infrastructure for quantum computing services, automating CI/CD pipelines and monitoring high-performance systems.
Contract FPGA engineer in Milton Keynes designing and implementing hardware logic for electronics products.
Develop embedded C/C++ and Python software for LEON3 softcore processors to build and integrate software-defined radios for satellite missions, including autoboot mechanisms and SpaceWire interfaces.
Principal digital back-end engineer designs and verifies ASIC flows using Cadence tools, focusing on RTL, synthesis, timing, and physical design for high-performance semiconductor IP.
Principal software engineer building secure, scalable systems in C/C++/Python for government cyber operations, leading junior developers and maintaining critical communication infrastructure.
Design and maintain automated test systems for aerospace avionics, integrating custom hardware with lab instruments to verify FPGA-based electronics and embedded systems.
Develop and maintain embedded firmware (C/C++) for 5G mmWave hardware, debug systems, and collaborate with hardware/RF teams to deploy next-gen telecom tech.
Develop and maintain embedded firmware (C/C++) for 5G mmWave systems, debug hardware platforms, and write automated tests in Python.
Design and optimize high-performance ASICs and FPGAs for low-latency trading systems, using industry-standard physical design tools and scripting to close timing and improve PPA.
Designs and maintains ultra-low-latency global networks for a quantitative trading firm, handling routing, switching, security, and co-location links.
Senior C/C++ embedded developer building sustainable software for media and public-sector clients using Linux and modern engineering practices.
Develop embedded software and FPGA solutions in C/C++ and VHDL for industrial systems, using CI/CD pipelines and Agile workflows.
Build and maintain enterprise web apps and embedded systems for electronics manufacturing, collaborating in Agile teams to deliver R&D-to-production solutions.
Location: Penang or KL (with travel to China approximately once a month) Job Summary We are looking for a hands-on Technical Software Manager to lead and supervise our software development team in China. The person…
Senior engineer designing, coding, and testing embedded and middleware components in C/C++ while building and maintaining CI/CD pipelines to automate builds, tests, and deployments.
Leads embedded software design and DevOps automation for high-tech systems, writing C++/C code and optimizing CI/CD pipelines to improve build, test, and deployment workflows.
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