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Develops and maintains mission-critical flight software for SpaceX's Starlink Mobile satellite network, working across embedded systems, real-time control, and network protocols to operate thousands of spacecraft in orbit.
Designs and optimizes FPGAs and ASICs for SpaceX's Starlink network, using Verilog/SystemVerilog and collaborating with cross-functional teams to enhance satellite and ground infrastructure performance.
Designs, deploys, and secures classified IT networks for national security missions, optimizing performance and reliability while ensuring compliance with strict security standards.
Designs and implements next-generation ASICs for SpaceX's Starlink network, focusing on physical design steps like synthesis, floorplanning, and place-and-route using industry-standard EDA tools.
Designs and implements next-generation ASICs for SpaceX’s Starlink network, focusing on physical design steps like synthesis, floorplanning, and timing closure to enable global satellite internet connectivity.
Principal Design Verification Engineer at SpaceX to develop and verify next-generation ASICs for Starlink satellites and ground infrastructure, ensuring high-performance connectivity in space and global networks.
Principal Design Verification Engineer at SpaceX designs, verifies, and validates next-generation ASICs and FPGAs for Starlink’s satellite and ground infrastructure, ensuring high-performance connectivity.
Designs and implements FPGAs and ASICs for SpaceX's Starlink network using Verilog/SystemVerilog, collaborating across teams to enhance satellite and ground infrastructure connectivity.
Develops and maintains software for testing, automating, and controlling advanced aerospace components like valves and avionics, using Python and embedded systems in a hardware-intensive environment.
Designs, develops, and tests flight software for SpaceX's Starship spacecraft and Super Heavy rocket, focusing on control systems, simulations, and integration with hardware.
Develops and tests flight software for SpaceX's Starship spacecraft and Super Heavy rocket, focusing on autonomous control systems and simulations using C++ or Rust.
Designs and implements software/firmware for next-gen avionics systems at SpaceX, focusing on reliability and integration with flight hardware, using C/C++ and embedded systems.
Designs and optimizes advanced IC packages for custom ASICs and RFICs used in SpaceX's Starlink satellites and ground systems, focusing on signal/power integrity and RF performance.
Design advanced IC packages for custom ASICs and RFICs used in SpaceX's Starlink satellites and ground systems, optimizing signal/power integrity and RF performance.
Designs and implements high-performance ASICs in Verilog/SystemVerilog for SpaceX’s Starlink network, collaborating with cross-functional teams to deliver space-grade silicon for global connectivity.
Designs and implements high-performance ASICs in Verilog/SystemVerilog for SpaceX’s Starlink network, collaborating with cross-functional teams to deliver space-grade chips that enable global broadband connectivity.
Designs and optimizes advanced ASIC/SOC chips for SpaceX's Starlink satellites and ground systems, focusing on physical implementation, timing closure, and verification using EDA tools.
Designs and implements advanced ASIC/SOC chips for SpaceX’s Starlink network, focusing on physical design flows, timing closure, and signoff checks to enable global satellite internet connectivity.
Designs, develops, and tests flight software for SpaceX's Starship spacecraft and Super Heavy rocket, working across application, OS, networking, and simulation layers to enable autonomous control and mission success.
Designs and implements software and firmware for next-gen avionics systems at SpaceX, ensuring reliable and safe launches while troubleshooting flight hardware/software.
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