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Digital Design Engineer Location: Santa Clara, CA Department: External - Client Requirement Job description : Role Overview We are seeking an ASIC Design Engineer to own digital design, integration, and bring-up for…
Embedded Software Engineer Department: CTO Location: Palo Alto, California Compensation: $116,300 – $154,130 • Offers Equity • Offers Bonus • This role has an annual bonus target of 5% Employment Type: FullTime About…
Sr Modem Firmware Engineer Location: Boise,Idaho,United States Department: 76 Product Development Work Location: onsite Grow with us Ericsson Inc. does not sponsor U.S work authorizations for this job position…
Junior Embedded Software Engineer Department: Engineering Location: Los Angeles, CA Employment Type: FullTime Junior Embedded Software Engineer Location: Los Angeles, CA About Observable Space At Observable Space,…
Windows Driver Validation Engineer supporting Nvidia Location: Santa Clara, CA Department: Tech & Engineering Sustainable Talent is partnering with Nvidia a global leader who's been transforming computer…
Design and validate high-speed SerDes (Serializer/Deserializer) circuits for Apple’s products, ensuring robust mixed-signal performance and system integration.
Designs, validates, and optimizes high-performance compute systems for AI workloads, from prototype to production, focusing on GPU/CPU infrastructure and energy-efficient deployment.
Hubble Network was founded with the intention of delivering on the promise of what Internet-of-Things (IoT) was supposed to be. We're building a global Bluetooth® network dedicated to machine-to-machine…
Join the system validation team at Apple's Hardware Engineering, where we validate system-level performance of Apple SoCs and other key modules (cameras, displays, and other state-of-the-art sensors) in a system…
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…
We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex…
Engineer tests and assembles server hardware, configures test benches, and troubleshoots hardware/software issues for an IT infrastructure integrator and equipment manufacturer.
Lead a team to design, develop, and deliver FPGA/ASIC solutions for avionics systems, using Verilog/SystemVerilog, Xilinx Vivado/Intel Quartus, and adhering to DO-254 standards.
Principal Hardware Engineer at HPE designs and validates high-end routing platforms, leading cross-functional teams in hardware development from concept to mass production.
Designs and optimizes complex System-on-Chip (SoC) architectures for automotive, edge, and radar applications, ensuring performance, power efficiency, and compliance with safety/security standards.
Develops and tests firmware for SSD products, ensuring performance and reliability, using C and Python while integrating AI-assisted tools.
Develops formal verification IP for hardware design using Verilog and SystemVerilog Assertions, focusing on industry-standard bus protocols like AXI or PCIe.
Designs, verifies, and implements RTL for power management ICs and SoCs, collaborating with architects and verification teams to deliver high-performance semiconductor solutions.
Lead verification of high-performance SRAM memory compilers and subsystems for Marvell’s chip IP, using UVM, C, and industry tools to ensure correctness and performance before silicon bring-up.
Principal Engineer designs advanced connectivity chips (Ethernet, USB, PCIe) using Verilog/SystemVerilog and ASIC flows, leading projects for Microchip’s Networking and Communications Group in Hauppauge, NY.
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