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Lead radar system architecture and performance modeling for air-to-ground missions, defining requirements and guiding integration/test across RF, software, and platform teams.
Lead radar systems engineering for the Open System Architecture Signal Injector (OSI), designing algorithms, requirements, and architectures to advance radar modeling and simulation capabilities.
Develops and analyzes radar system architectures and algorithms for the Open System Architecture Signal Injector (OSI) product, using MATLAB, Python, and Linux to model radar performance and support requirements definition.
Design and model radar systems for defense applications, developing algorithms and system architectures using MATLAB, Python, and Linux to meet OSI requirements.
Designs, develops, and tests EO/IR or RF signal processing algorithms for missile systems, integrating them into hardware and collaborating across engineering disciplines to ensure performance and compliance with requirements.
Designs and tests RF/EO/IR signal-processing algorithms for missile systems, integrating them into hardware and validating performance in lab and live-fire tests.
Principal engineer leading radar system architecture and requirements for missile defense simulations, using modeling tools and signal processing to validate performance.
Sensors Fall/Spring Co-op – RF Systems Engineer Location: Woburn, MA Department: Space & Counter Space (SCS) Sensors Fall/Spring Co-op Are you motivated by opportunities to learn and grow? Do you want to…
Lead Systems and RF System Engineer Location: Melbourne, FL Department: Space & Counter Space (SCS) About the Team: The STR Sensors Division specializes in the development of advanced sensor systems, with a…
Data Scientist II on Socure's Digital Intelligence team developing ML features and risk signals for fraud detection and identity verification using device, network, browser, mobile, and behavioral telemetry. Works with Python, SQL, Spark, and ML frameworks like XGBoost and TensorFlow to build production-grade risk models that operate at scale in real-time decisioning systems.
Data Scientist Location: Lyon Time Type: Full time Job Description Le contenu du poste est libellé en anglais car il nécessite de nombreuses interactions avec nos filiales à l’international, l’anglais étant la langue…
Microwave Instrument System Engineer Location: Getafe Area Time Type: Full time Job Description Job Description: The postholder will be responsible for the definition, engineering, performance estimate of active and…
Senior Digital ASIC Design Engineer Location: Upton, NY Time Type: Full time Job Description The mission of the Instrumentation Division is to develop state-of-the-art instrumentation required for experimental research…
Senior Engineer, Product Applications Location: Ireland, Limerick, Spain, Valencia, Cortes Valencianas Time Type: Full time Job Description About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global…
Role Overview: This is a senior technical role for an experienced FPGA engineer who thrives on solving complex digital IF and signal-processing challenges. You will lead the architecture and development of FPGA-based…
Senior Hardware Test Engineer Location: Tigard, OR Time Type: Full time Job Description Please note that we are not currently accepting resumes or additional support from talent agencies or third-party sources. Any…
Contract Hardware Test Engineer Location: Tigard, OR Time Type: Full time Job Description The role, at a glance: Biamp Systems is seeking an experienced Hardware Test Engineer III for a contract-to-hire role.…
Leads a hardware design team developing 5G baseband IP for satellite-based base stations, focusing on power efficiency and delivery of Layer 1 IP using RTL, FPGA, and ASIC techniques.
Designs and implements FPGA/ASIC hardware for satellite-based 5G base stations, focusing on signal processing and power efficiency using Verilog/SystemVerilog and EDA tools.
Design Engineer at AccelerComm develops advanced IP, system, and board solutions for 5G wireless communications, using SystemVerilog, EDA tools, and hardware optimization techniques.
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