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Die DEUMU Deutsche Erz- und Metall-Union GmbH ist eine 100%ige Tochtergesellschaft der Salzgitter AG, einer der führenden Stahltechnologie- und Anlagenbau-Konzerne Europas. Wir legen großen Wert auf die Zufriedenheit…
Die DEUMU Deutsche Erz- und Metall-Union GmbH ist eine 100%ige Tochtergesellschaft der Salzgitter AG, einem der führenden Stahltechnologie- und Anlagenbau-Konzerne Europas. Für den Bereich Stahlbearbeitung in…
Werde Teil unserer Healthcare Mission und Mitglied unseres «Sales Teams» als Area Sales Manager:in & Medical Consultant Care (80%) Als Area Sales Manager & Medical Consultant Care verstärkst du unser Team im…
Werde Teil unserer Healthcare-Mission als Senior Business Development Manager Wound Care (100%) Neuhausen am Rheinfall und/oder Remote In dieser Position verantwortest du den nachhaltigen Ausbau des „Wound-Care…
Werde Teil unserer Healthcare Mission als Market Manager:in Medical Nutrition / Ernährungsberater:in (80-100%) und baue mit uns ein zukunftsrelevantes Geschäftsfeld auf. Bei IVF HARTMANN entwickeln wir Lösungen dort,…
Eine Welt – eine Philosophie – eine Familie, dafür steht die Unternehmenskultur von BESTSELLER. 1975 als Familienunternehmen in Dänemark gegründet, beschäftigen wir heute mehr als 18.000 Mitarbeiter in über 3.000…
Die Ornua Deutschland GmbH mit Sitz in Neukirchen-Vluyn mit der Marke Kerrygold ist eine Tochtergesellschaft der irischen Ornua Cooperative Limited in Dublin, der genossenschaftlichen Organisation von irischen…
Dein Team Mit dem OMR Festival veranstalten wir das größte Festival für das Digital-Business in Europa mit zuletzt über 70.000 Besucher*innen in 2026. Hinter den Kulissen sorgt unser F&B Team für reibungslose…
Dein Team OMR Reviews hat als jüngstes Mitglied des OMR Kosmos die Ambition, sich als führende Software-Bewertungsplattform im DACH Markt zu etablieren. Auf OMR Reviews bringen Erfahrungsberichte echter Nutzer*innen…
Data Engineer at Pixum (online photo printing) in Cologne who owns the end-to-end data stack: building the Data Warehouse and SQL performance, developing Python ETL jobs, implementing user/conversion tracking with tools like JENTIS and Adobe Analytics, and helping migrate the warehouse to new infrastructure.
Velaura is hiring a Senior Design Verification Engineer in Bangalore to verify its next-generation Physical AI SoC — building UVM/SystemVerilog testbenches, running formal, emulation, and FPGA prototyping, performing HW/SW co-verification, and debugging issues from RTL blocks to post-silicon.
Design Verification Engineer owning verification of a custom high-performance CPU (fetch, decode, load-store, caches) for Velaura's Physical AI SoC. Day to day: building SystemVerilog/UVM testbenches with C/C++, writing test and coverage plans, running regressions, and supporting emulation, FPGA prototyping, and pre-silicon bring-up.
Design Verification Engineer owning verification of Velaura's custom AI acceleration hardware (matrix/vector compute engines) for its Physical AI SoC in Bangalore. Day to day: building SystemVerilog/UVM/C/C++ verification environments, developing GEMM/GEMV reference models, and verifying numerical precision, throughput, and performance per watt under LLM and vision workloads.
Design Verification Engineer verifying Velaura's next-generation Physical AI SoC in Bangalore: building UVM/SystemVerilog and C++ verification environments, running formal verification, emulation, and FPGA prototyping, and performing HW/SW co-verification and debug from RTL blocks through post-silicon.
The position involves designing, developing and deploying UVM based Testbenches for multi-core, multi-threaded processor subsystems with emphasis on verifying and signing off performance and power along with…
Senior engineer doing RTL and FPGA design and verification of digital blocks for Omni Design's next-generation wireless chips targeting automotive and space applications. Day to day: analyzing power/performance/area tradeoffs, implementing test strategy and BIST, validating on FPGA, and leading silicon design with Verilog/SystemVerilog, UVM, C/C++ and scripting.
Leads and manages the digital engineering team at Omni Design Technologies, driving development of mixed-signal SoCs for automotive and space applications — from RTL design, integration, and verification through timing closure and silicon validation. Core tools: Verilog/SystemVerilog, UVM, Cadence/Synopsys flows, and FPGA emulation.
Pre-silicon GPU verification engineer at Intel: builds and executes IP-level verification plans, SystemVerilog/UVM test benches, and simulations for 3D graphics, media, and display logic; debugs failing tests and collaborates with GPU architects, RTL, and physical design teams. Hybrid work model at US Intel sites.
Designs and integrates microarchitecture, RTL logic, and verification environments across multiple IPs for Intel's client chipsets and SoC products, including pre-silicon validation, test plans, and debugging. Core focus on RTL design, UVM, and formal verification; on-site role in Penang, Malaysia.
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