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Advanced Micro Devices, Inc
2 views 3 days ago

Silicon Design Engineer

NewBe an early applicant APAC
Singapore

RTL digital design engineer on AMD's FPGA Product Development Silicon Integration team in Singapore: integrates IP from multiple design teams into next-generation FPGA/SoC products, builds and verifies full-chip RTL connectivity models, and develops custom tooling — using Verilog/SystemVerilog, ASIC CAD tools (VCS, Design Compiler, Primetime), and Python/Perl/Shell scripting.

AI Asic Bash CAD FPGA +7 skills
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ALTEN
3 days ago

Spécialiste FPGA - Aéronautique (F/H)

NewBe an early applicant Europe
France

Rejoignez une équipe d’experts en conception/validation FPGA pour des systèmes critiques chez des leaders mondiaux de l’aéronautique. Nous recherchons un spécialiste FPGA capable de développer et de valider des designs…

FPGA Python Uvm Verilog VHDL
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FuriosaAI
3 views 3 days ago

[신입/경력] Hardware Engineer (석사/박사)

NewBe an early applicant APAC
South Korea

About FuriosaAI FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea…

AI Bash C++ FPGA LLM +6 skills
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ALTEN
3 days ago

Ingénieur Spécialiste Electronique Hardware FPGA / ASIC - F/H

NewBe an early applicant Europe
France

La Direction des Compétences et des Practices (DCP) est l’entité d’accueil des Spécialistes du Groupe Alten. Elle est dédiée à la gestion des besoins d’expertise haut niveau. Pour renforcer sa Practice Ingénierie…

Altium FPGA I2c KiCad Verilog +1 skills
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ADVANS PORTUGAL | An ADVANS GROUP Company
3 days ago

FPGA Engineer

NewBe an early applicant Europe
Portugal

Job Description: To develop our microelectronics division, ADVANS Portugal is looking for an FPGA Engineer . As an FPGA Engineer, you will work on innovative and stimulating projects focused on tomorrows technologies.…

FPGA Git SVN SystemVerilog Unit Testing +3 skills
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Google
3 views 3 days ago

Design Verification Engineer, Google Cloud TPU

NewBe an early applicant North America
United States

Verifies complex digital design blocks for Google's TPU (Tensor Processing Unit) custom silicon that accelerates AI/ML workloads: planning verification from specs, writing coverage, debugging tests with design engineers, and building constrained-random verification environments using SystemVerilog and UVM through tape-out.

AI Asic Cloud GCP Machine Learning +5 skills
138K – 197K $
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ALTEN
3 days ago

Ingénieur FPGA – Secteur Aérospatial (H/F)

NewBe an early applicant Europe
France

Rejoignez une équipe d’experts en conception/validation FPGA pour des systèmes critiques chez des leaders mondiaux de l’aérospatial. Nous recherchons des ingénieurs spécialisés capable de développer et de valider des…

FPGA Python Uvm Verilog VHDL
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Astera Labs Early Career - North America 2027
3 views 3 days ago

Design Engineering Intern (CCE2)

NewBe an early applicant North AmericaInternshipIntern
United States

Design Engineer Intern (CCE2) Astera Labs · San Jose, CA · Internship · On-site About Astera Labs Astera Labs builds connectivity solutions that help power modern AI infrastructure. Compute Connectivity Engineering 2…

AI Automation Bash Bitbucket Confluence +17 skills
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Astera Labs
8 views 3 days ago

Principal Physical Design Engineer, STA

Open 135d On-siteNorth AmericaPrincipal H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Principal Physical Design Engineer (STA) at Astera Labs designs and optimizes timing for high-performance connectivity ASICs used in AI infrastructure, leveraging advanced EDA tools and TSMC 7nm processes.

AI Automation Cloud Ethernet Networking +8 skills
209K – 250K $
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Astera Labs
12 views 3 days ago

Senior ASIC Design Engineer

Open 135d MENASenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
Israel

Designs high-performance digital blocks for AI infrastructure chips, using Verilog/SystemVerilog and EDA tools to solve data bottlenecks in semiconductor connectivity solutions.

AI Asic Automation Ethernet PCIe +5 skills
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Astera Labs
12 views 3 days ago

Manager Design Verification

Open 40d MENA H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
Israel

A technical manager role at Astera Labs in Tel Aviv owning RTL design execution for connectivity silicon blocks that power large AI clusters — taking features from microarchitecture through synthesis, timing closure, and tapeout using Verilog/SystemVerilog with PCIe, CXL, and Ethernet interconnect technologies.

AI Ethernet PCIe Rtl SystemVerilog +1 skills
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Astera Labs
10 views 3 days ago

Tech Lead ASIC Design Engineer

Open 87d APACLead H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
India

Leads the design and implementation of high-performance digital IPs and SoC subsystems for AI infrastructure connectivity chips using Verilog/SystemVerilog, CXL, PCIe, and Ethernet.

AI Asic Bash Cloud Ethernet +11 skills
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Astera Labs
7 views 3 days ago

Analog Mixed Signal Design Engineer

NewBe an early applicant APAC H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
Singapore

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the…

AI Cmos Ethernet MATLAB Pcb +3 skills
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Constellation
2 views 3 days ago

Hardware Engineer

NewBe an early applicant On-siteNorth AmericaContract
United States

Founding-team hardware engineer owning the hardware behind Constellation's multimodal data collection: keeping fleets of biosensor/camera/audio rigs synchronized and healthy, designing custom PCBs and firmware, and writing C/C++ embedded code plus Python tooling that ties devices to the data pipeline.

AI Altium Assembly Bluetooth CAD +16 skills
180K – 260K $
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Microsoft
1 views 3 days ago

Design Verification Engineer

NewBe an early applicant On-siteNorth AmericaFull-time
United States

Overview Microsoft’s Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission.…

AI Azure Cloud Generative AI Itar +6 skills
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STAR CAREER CONSULTING PTE. LTD.
3 days ago

Assistant/Principal Engineer (FPGA)

Open 110d APACPrincipal
Singapore

Assistant/Principal Engineer (FPGA) Required to manage customer and system-level requirements into detailed FPGA specifications, while also ensuring that FPGA-based subsystems function correctly within the larger…

Firmware FPGA JTAG Oscilloscope Python +3 skills
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ARM Backed by SoftBank Vision Fund
4 views 3 days ago

Staff PCIe Design Engineer

Open 87d HybridNorth AmericaStaff Ireland permit employer — This employer was issued Irish employment permits this year or in the two years before, per the Department of Enterprise, Tourism and Employment. The permits belong to the employer and are not a commitment to sponsor this role.
Canada

Designs and integrates PCIe, CXL, and other I/O subsystems for ARM-based SoCs, writing RTL, debugging, and collaborating with verification and backend teams.

Accessibility AI Ethernet PCIe Perl +2 skills
159K – 216K CAD
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IBM
2 views 3 days ago

Entry Level Hardware Developer 2027 -Poughkeepsie, NY

NewBe an early applicant HybridNorth AmericaInternshipJunior Licensed UK sponsor — This employer appears on the GOV.UK register of licensed sponsors for the Skilled Worker and related work routes. The licence belongs to the employer and is not a commitment to sponsor this role.Licensed NL sponsor — This employer appears on the IND public register of recognised sponsors for work and highly skilled migrants. The recognition belongs to the employer and is not a commitment to sponsor this role.Ireland permit employer — This employer was issued Irish employment permits this year or in the two years before, per the Department of Enterprise, Tourism and Employment. The permits belong to the employer and are not a commitment to sponsor this role.
United States

At IBM, work is more than a job—it’s a calling: To build. To design. To code. To consult. To think alongside clients and sell. To make markets. To invent. To collaborate. Not just to do something better, but to pursue…

Agile AI Analytics Asic Automation +17 skills
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5 views 3 days ago

SOC/IP Integration Engineer (eInfochips)

NewBe an early applicant RemoteNorth AmericaFull-time
United States

Position: SOC/IP Integration Engineer (eInfochips) Job Description: What You'll Be Doing: Good in understanding RTL Design and Digital concepts Subsystem or SoC integration Integration 1P and 3P IP's, generating 3P…

Cloud Rtl Verilog
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Analog Devices
3 days ago

Design Verification Engineering Intern

NewBe an early applicant UKInternshipIntern
United Kingdom

Are you a problem solver looking for a hands-on internship position with a market-leading company that will help develop your career and reward you intellectually and professionally? About Analog Devices Analog…

AI Automation Bash CSS Perl +6 skills
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