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Build and deploy AI agents, ML models, and agentic workflows to automate FPGA testing and development using Python, LLMs, and RAG pipelines.
Build and debug FPGA-based emulation platforms (Synopsys HAPS) to validate complex SoC/ASIC designs and enable early software execution before silicon tape-out.
Builds and maintains software for ingesting, processing, and routing satellite telemetry and command data using CCSDS protocols and high-performance pipelines.
Design and implement FPGA blocks for high-rate data transport and signal processing in satellite ground stations, using Verilog/SystemVerilog and Python.
Designs and verifies electrostatic-discharge protection circuits for advanced ASIC/FPGA chips using SPICE simulations, layout reviews, and foundry PDKs.
Build and maintain embedded firmware for security-critical hardware using Yocto Linux, C/C++, and RTOS, integrating with FPGAs and constrained devices.
Design and implement FPGA-based networking and DSP blocks for satellite ground stations, ensuring resilient, high-rate data links for real-time space communications.
Build low-level embedded software and drivers for next-gen networking platforms, programming NPUs/ASICs and enabling high-performance routing systems in Linux environments.
Develop low-level firmware and platform software for next-gen SoCs/ASICs, including bootloaders, BSPs, and device drivers, from pre-silicon enablement to post-silicon bring-up.
Develops digital and analog circuit hardware for remote communication systems, including design, testing, and documentation of solutions for industrial applications like renewable energy, automotive, and chemical systems.
Location: Madrid Tres Cantos, Spain A Joint Venture between Thales (67%) and Leonardo (33%), Thales Alenia Space is a global space manufacturer delivering, for more than 40 years, high-tech solutions for…
Build and optimize ML models to enhance Altera’s FPGA compiler, focusing on timing closure, resource utilization, and power efficiency using PyTorch/TensorFlow.
Designs and drives the security architecture for FPGA, SoC, and ASIC products, focusing on hardware security, Root of Trust, secure boot, and cryptography to ensure resilient, compliant silicon solutions.
Design and implement high-performance embedded RF systems and distributed C++ architectures for real-time signal processing in resource-constrained environments.
Designs high-performance NIC architectures for AI networking, focusing on RDMA, RoCE, and multipath transport, while guiding hardware/software co-design and industry standards.
Develop embedded C++ software for robotics and automation systems in semiconductor manufacturing, including motion control and hardware interfaces, while collaborating on testing and troubleshooting.
Design and run verification environments for next-gen eFPGA and SoC IP using UVM, SystemVerilog, and assertions to ensure silicon tape-out quality.
Lead the design, testing, and integration of FPGA firmware for high-performance imaging systems, collaborating with hardware and software teams to meet manufacturing requirements.
Designs and implements system-level security for Netflix’s Open Connect edge appliances, securing hardware (FPGA, BIOS/UEFI, BMC) and OS layers (FreeBSD/Linux) to protect global content delivery and gaming infrastructure.
Design and maintain FPGA prototyping platforms (HAPS/Xilinx) and write C/C++ firmware tests for SoC verification, debugging silicon bring-up issues in the lab.
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