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Designs and deploys test systems for satellite PCBs, debugs failures, and trains manufacturing partners on high-reliability test processes using RF, power, and automation tools.
Professional Services Engineer Location: North America Department: Sales Be part of the team that defends the networks the world depends on Corelight defends the world’s most sensitive networks—from global commerce to…
Provide deep technical support for Arista’s networking hardware and EOS software, troubleshooting complex issues and collaborating with customers and engineering teams.
Design and maintain Booking.com’s internal cloud platforms on GCP/AWS, automating secure, scalable infrastructure for developers using Go/Python and Terraform.
6-month internship configuring CI/CD pipelines, scripting automation tasks, and evaluating DevOps tools for a global financial markets data provider.
Lead the design of camera and image-processing ASIC IP blocks using RTL, synthesis, and PPA analysis, while driving GenAI tools for hardware workflows and agentic AI solutions.
Develop and integrate embedded software for mobile chipsets, collaborating with cross-functional teams to debug, optimize build systems, and ensure performance and stability in C/C++/assembly.
Designs and implements CPU micro-architectures and RTL for high-performance, low-power chips, collaborating with architects and verification teams.
Designs and implements ASIC physical layouts for DSP cores used in mobile, compute, and AI products, handling floorplanning through tapeout.
Design and optimize CPU physical layouts using synthesis, place & route, and timing/power analysis to meet PPA targets for Qualcomm's next-gen processors.
Implementation Engineer, Staff Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware…
Designs and verifies high-speed interconnect protocols (PCIe, CXL, AXI) using UVM and SystemVerilog to ensure ASIC/subsystem correctness before tape-out.
Senior ASIC Implementation Engineer, Low Power AI Location: Markham, Ontario, Canada Department: ASICS Engineering Work Location: onsite Company: Qualcomm Canada ULC Job Area: Engineering Group, Engineering Group >…
Designs and optimizes System-on-Chip (SoC) architectures for mobile/IoT/XR platforms, focusing on performance, power, and security trade-offs.
Designs and implements mixed-signal IP blocks (DDR, USB, PCI, PLL) using nanometer technologies, focusing on physical design flow, timing closure, and verification to tape out high-quality silicon.
Design and optimize the physical layout of high-speed CPU cores, ensuring timing closure and power-performance-area targets for next-gen Qualcomm chips.
Design verification engineer building UVM testbenches and test plans for USB controllers (USB3.2, USB2.0) to ensure compliance with industry standards.
Design Verification Engineer at Qualcomm verifies Bluetooth chipset designs using SystemVerilog/UVM, formal checks, and emulation to ensure hardware meets specifications before production.
Design and optimize timing constraints for Qualcomm’s Oryon CPU cores using industry tools like PrimeTime and Tempus, scripting in TCL/Python, and collaborating with RTL and implementation teams.
Senior Engineer - 5G Systems Engineer Location: Mumbai, Mahārāshtra, India Department: Systems Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group…
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