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Senior Chip Design Verification Engineer
We are looking to hire a Senior Chip Design Verification Engineer to join NVIDIA Chip Design group. The work environment is dynamic and challenging as our employees are currently working on innovative, next-generation…


ASIC Floorplan Design Engineer - New College Grad 2026
We are now looking for a ASIC Floorplan Design Engineer - New College Graduate. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoC's and GPU's. This position offers you…
I/O Design Engineer
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ASIC Physical Design, Sr Engineer - 18393
Alternate Job Titles Physical Design Engineer ASIC Implementation Engineer Digital Physical Design Engineer RTL to GDS Engineer Backend Design Engineer We Are Synopsys is the leader in engineering solutions from…
IP Implementation & Physical Design Engineer ( Serdes Subsystem) - 18452
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
Senior VLSI Design Engineer
The Istra Hardware team is a top-tier group focused on developing and refining the hardware capabilities within Istra's complex product. Our implementation process is end-to-end, covering all hardware development…
Low Latency FPGA Developer
The FPGA Developer will design, implement, and test high-performance RTL for low-latency high-frequency trading strategies. The role requires expertise in VHDL/Verilog, FPGA debugging tools, and collaboration with software teams to optimize trading system performance.
Design Verification Engineer
The Design Verification Engineer will develop verification environments, test plans, and perform functional RTL testing at the IP and SoC levels. The role requires expertise in ASIC verification methodologies, SystemVerilog, and various communication protocols.
Mid Level ASIC Design Engineer
Design and implement a high-performance, low-power ASIC accelerator for AI inference in autonomous-driving perception modules using Verilog, SoC IP integration, and timing/power optimization.
Principal Memory Subsystem Engineer (Design or DV)
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission.…
