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Ricursive Intelligence is a frontier AI Lab focused on building self-improving systems, starting with chip design. We are reinventing chip development and closing the loop between AI and the hardware that fuels it,…
Role Overview This is a senior leadership role at the intersection of New Product Introduction (NPI) and Factory Quality. The General Manager will serve as the primary bridge between NOISE’s product management teams,…
The Silicon Product & Test Engineer will manage the post-silicon productization of bitcoin mining ASICs, overseeing everything from bring-up to high-volume manufacturing. The role involves silicon characterization, yield optimization, and developing ATE test strategies using tools like Python and ATE platforms.
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a…
Lead physical design implementation of AMD's high-speed interface IPs (DDR/LPDDR/GDDR, PCIe, SerDes PHYs) in Bangalore, owning everything from floorplanning and power planning through timing closure and tapeout signoff on advanced nodes. Works cross-functionally with Cadence/Synopsys flows while mentoring engineers and driving methodology automation.
Do you have a passion for crafting entirely new solutions? As part of our Digital Design Engineering group, you’ll take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team…
Votre futur équipe Passionné(e) par le nucléaire et le digital, vous souhaitez contribuer à une transformation industrielle majeure ? Cette opportunité est faite pour vous. Rejoignez les équipes digitales de Loïc,…
Title: FPGA Design and Verification Contractor Term: Long-Term Contract/Perm Possible Location: Remote/USA Required: Candidates must be in US US Citizen or Green Card Holder Requirements Responsibilities: 5+ years…
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
Pay Plan Title: Peer Support Specialist Working Title: Peer Support Specialist Cost Center: 9200/Community Transition Position Number: 72082 FLSA Status: Non-Exempt Posting Salary Range: $42,682 - $54,205 Office…
Develops and integrates PCIe IP blocks using Verilog RTL for a Bitcoin mining and AI cloud company, ensuring functional coverage and collaborating with verification and software teams.
Lead FPGA design and verification for software-defined radio platforms powering next-gen electronic warfare systems using AMD/Xilinx SOC/FPGA tools and VHDL/Verilog.
Digital Design Engineer at Anduril Industries developing FPGA and SoC platforms for high-performance embedded systems, avionics, and mission-critical hardware using RTL design in VHDL/Verilog/SystemVerilog.
Own verification of FPGA/SoC designs for flight-critical avionics using SystemVerilog and UVM methodology on AMD (Xilinx) platforms.
Senior FPGA/Digital Design Engineer on Anduril's Air Dominance and Strike team, designing and integrating RTL in VHDL/Verilog/SystemVerilog for FPGA and SoC platforms in flight-critical avionics for autonomous air vehicles. Work spans the full cycle: microarchitecture, RTL implementation, simulation, synthesis, timing closure, lab bring-up, and system integration.
Senior FPGA Verification Engineer at Anduril (Costa Mesa, CA) owns UVM-based, coverage-driven verification of FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics. Core tech: SystemVerilog, UVM, SVA, simulators like Questa/VCS/Xcelium/Vivado, with DO-254 safety standards.
Designs and verifies advanced SoCs for automotive ADAS systems, focusing on FPGA prototyping, digital IP integration, and hardware/software partitioning using Verilog and FPGA tools.
Job Description The Role ASTRAWAVE develops chips for Data Processing, IP Licensing, Network, Bus, Chiplet Interconnect as well as Chip Customization for different customers. We arecurrently seeking experienced analog…
Leads ASIC physical design for Cisco’s networking hardware, optimizing chip layouts, managing cross-functional teams, and driving SoC execution from concept to release in advanced process nodes.
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