Hardware Jobs in United States
There are 3,598 open Hardware jobs in United States on freehire right now. 673 of them were posted recently. The skills employers ask for most often are ai, python and automation.
Salary
| Currency | Period | 25th | Median | 75th | Postings |
|---|---|---|---|---|---|
| USD | year | $152,650 | $185,000 | $212,785 | 847 |
| USD | hour | $28 | $40 | $48 | 31 |
From postings that disclose pay. Currencies are counted separately, never converted.
Most requested skills
- ai 35%
- python 28%
- automation 20%
- firmware 18%
- fpga 18%
- verilog 17%
- networking 15%
- pcb 14%
How the work is done
- Onsite 682 · 19%
- Hybrid 295 · 8%
- Remote 122 · 3%
Visa sponsorship offered in 45% of the 1,012 postings that state a position on it.
Seniority
- Senior 760
- Principal 276
- Staff 203
- Lead 197
- Intern 143
- C-level 54
Who is hiring
- 1000+ employees 1,169
- 501-1000 employees 246
- 11-50 employees 107
- 51-200 employees 89
- 201-500 employees 13
- 1-10 employees 7
GPU Hardware Program Manager
Manage GPU hardware development programs from IP to commercialization, coordinating cross-functional teams to deliver mobile GPUs with features like ray tracing for Samsung Galaxy devices.
Lead Silicon Software and Hardware Integration Engineer
Lead the integration of custom silicon (SoCs/ASICs) with firmware and software stacks, from pre-silicon planning through lab bring-up and system debugging for a next-gen satellite communications network.
HBM SoC Physical Design Engineer
Designs and implements high-bandwidth memory SoC physical layouts, using EDA tools to optimize performance, power, and area while integrating complex IP and ensuring manufacturability.
Analog ASIC Design Engineer
Analog & Mixed-Signal ASIC Design Engineer At Tektronix, we believe innovation starts with our customer. This approach has led us to a seventy-five-year history of delivering outstanding solutions to customers in…
ASIC Design Engineer
Designs and implements ASIC/SoC RTL (Verilog/SystemVerilog) for high-performance SSD controllers, collaborating with verification, validation, and firmware teams to deliver next-gen enterprise and AI data center storage solutions.
Senior Technical Program Manager – Lab & Hardware
Coordinates DDN’s lab consolidation and hardware build support, ensuring R&D has the systems and capacity needed while managing site moves, equipment migration, and build schedules.
Hardware R&D Engineering Intern (Fall 2026)
R&D intern at Formlabs designing and testing next-generation 3D printing hardware and processes, working with mechanical, systems, and software teams in a hands-on lab environment.
Sr. FPGA Engineer II
Designs, codes, and tests FPGA logic for space-based electro-optical systems supporting U.S. defense and intelligence missions using Xilinx tools.
Principal FPGA Engineer
Design and implement FPGA firmware for advanced electro-optical spacecraft payloads supporting U.S. defense and space missions using VHDL and embedded systems.
Amazon Web Services, Inc. Senior Hardware Development Engineer, AWS Mainstream Compute
Designs and develops next-generation server hardware for AWS data centers, collaborating with global teams to ensure high performance, reliability, and cost efficiency at scale.
TPU SoC Design Engineer, Cloud
Designs and verifies custom silicon for Google's TPU AI accelerators, focusing on SoC-level RTL, architecture, and integration within AI/ML systems.
Hardware-in-the-Loop Engineer, Charging and Energy
HIL Engineer II, Charging and Energy Location: 2700 California (Torrance California) Category: Energy & Charging Employment Type: FULL_TIME Tags: Full Time, Rivian Automotive About Rivian Rivian is on a mission to…
Senior Staff Electronic Design Engineer, ADAS Hardware
Sr. Staff Electronic Design Engineer (ADAS Hardware) Location: 607 Hansen (Palo Alto California) Category: Mechanical & Electrical Engineering Employment Type: FULL_TIME Tags: Full Time, Rivian Automotive About…
Silicon Design Engineer
Designs and implements advanced semiconductor testchips from RTL to GDSII tapeout, focusing on physical design, timing closure, and silicon validation for high-performance ASIC/FPGA solutions.