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Senior Design Engineer (CAD & Methodology)
About Bitdeer Technologies Group Bitdeer is a world-leading technology company for AI and Bitcoin mining infrastructure. Bitdeer is committed to providing comprehensive Bitcoin mining solutions for its customers and…
Senior DevOps Developer (PDSW scrum) [585]
Build and maintain hybrid-cloud and on-premises infrastructure for D-Wave’s quantum computing services, automating CI/CD pipelines and ensuring 99.9% uptime for enterprise-grade systems.
Lead Design Verification Engineer
Lead pre-silicon verification of semiconductor IPs and SoCs using UVM, SystemVerilog, and industry simulators to ensure functional correctness before tape-out.
Digital Design Engineer
Design-for-Test engineer implementing scan, MBIST, JTAG, and ATPG flows for complex SoCs to improve test coverage and silicon yield.
SRAM/ROM Circuit Design Engineer
SRAM/ROM Circuit Design Engineer Location: Austin (Oakhill, Office) Time Type: Full time Job Description NXP’s Austin Memories team is seeking an experienced memory circuit design engineer for our SRAM and ROM internal…
Senior Engineer, Design Enablement
Senior engineer developing and testing semiconductor design components (LVS/PERC) for Process Design Kits (PDK) using EDA tools like Cadence Virtuoso.
Digital Design Engineer
Designs and verifies digital RTL subsystems for semiconductor products, using SystemVerilog/Verilog and collaborating with architecture and verification teams.
Senior Director CAD & Design Methodology
Lead the ASIC design methodology, CAD tools, and engineering infrastructure for an AI-focused semiconductor startup, defining flows from RTL to tapeout and scaling the CAD organization.
FPGA Team Lead
Lead a small team developing FPGA firmware for aerospace/defense avionics under DO-254/DO-178C, using VHDL and simulation tools while coordinating tasks and mentoring engineers.
Mixed Signal Design Verification Engineer
Designs and verifies mixed-signal ICs, building simulation environments and automated regressions to ensure silicon meets specs before tapeout and aligns with customer needs.
Physical Design Engineer
Own clocking and physical design flows for complex SoC/ASIC chips, including CTS, PnR, timing closure, and automation using Tcl/Python.
Sr. FPGA Design & Verification Engineer
Design and verify FPGA-based hardware for Dolby’s cinema servers, audio processors, and HDR projection systems using VHDL/Verilog/SystemVerilog and advanced verification tools.
Diagnostics Software Engineer
Build and test diagnostics and manufacturing tests for high-speed networking hardware, using C/Python on Linux to validate ASIC-based boards and support customer deployments.
Senior Engineer - ASIC Design
Design ASIC IP blocks and subsystems for 5G/6G mobile networks using SystemVerilog, AMBA protocols, and RTL sign-off tools.
Senior Memory Systems Design Engineer
Position Overview: We are seeking an experienced System Design Engineer to join our dynamic engineering team. This position offers the opportunity to work on next generation NAND Flash Storage systems, develop…
Senior data engineer
Build and optimize Microsoft-based data infrastructure for real-time financial analytics, fraud detection, and BI using Azure Data Platform, Microsoft Fabric, and SQL Server.
FPGA Engineer
Design and optimize FPGA/SoC solutions for high-performance digital signal processing and RF applications using Xilinx devices and Vivado.
Senior Engineer - Low Power Design
Designs and optimizes low-power ASICs for 5G/6G telecom infrastructure using Synopsys and Ansys tools, ensuring power budgets are met from RTL through tape-out.
Senior FPGA Engineer
Design and verify FPGA firmware for spacecraft subsystems using VHDL/SystemVerilog, ensuring real-time control and fault tolerance for high-power satellite missions.