Tech jobs
Job listings
Senior Staff Software Development Engineer
Develop embedded firmware for AMD’s networking products, collaborating with hardware teams to refine silicon designs and optimize network stacks for cloud and AI systems.
Staff Software Development Engineer - Rust, Compilers, and GPU Systems
Build next-gen GPU systems software in Rust, focusing on compilers, runtimes, and low-level tooling to improve safety and correctness of AMD’s hardware-software stack.
GPU Performance Architect
Architect GPU performance by analyzing game/AI workloads, identifying bottlenecks, and proposing hardware improvements using C/C++, Python, and GPU APIs like Vulkan/CUDA.
Senior FPGA Engineer
Designs, tests, and deploys FPGA firmware for rocket avionics systems, shepherding custom digital electronics from concept through flight operations on Relativity Space's Terran R launch vehicle.
Software Engineer, Silicon Design Methodology
Build design methodologies and software tools to accelerate OpenAI’s custom AI-native silicon development, collaborating with architects and engineers to improve iteration speed and quality.
Staff DFx Methodology Architect
Architect and implement DFx (Design for Test, Debug, etc.) methodologies and RTL for AMD’s AI-focused SoCs and ASICs, ensuring power, performance, and timing targets while collaborating across global teams.
Software Engineer II, Android
Build and lead Pinterest’s Android platform, driving technical strategy, cross-team initiatives, and developer experience while leveraging AI to accelerate large-scale migrations and refactors.
FPGA Engineer
Design and optimize FPGA-based host and network IO subsystems for Cerebras' AI supercomputers, including RoCE v2, switching fabric, and proprietary WSE interfaces.
RTL IP Design Engineer
Designs and verifies RTL IP blocks for networking solutions, collaborating with architects and physical design teams to ensure first-pass silicon success.
Design Verification Engineer
Verify and validate AMD’s next-gen GPU and SOC designs using Verilog/SystemVerilog, UVM, and emulation platforms like Veloce/Zebu to ensure functional correctness and performance.
Senior Product Planning Engineer - Simulation, Security, and Deployment
Lead the roadmap for AMD’s FPGA/SoC simulation tools (UVM, SystemVerilog, HDL), RTL encryption, and deployment workflows, shaping verification methodologies and influencing industry standards.
Technical Marketing Engineer – FPGA Design
Technical Marketing Engineer creating training, documentation, and demos for AMD’s Vivado FPGA tool suite, validating features and enabling customers through clear technical communication.
Senior Technical Marketing Engineer - Vivado
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…
Firmware Engineer
Design and implement FPGA firmware for next-gen radar and sensing systems, integrating with software and hardware for defense and commercial applications.
FPGA Engineer
Design and implement FPGA-based digital signal processing for next-gen radar and sensing systems, integrating with software and hardware in a defense-focused product company.
Sr. FPGA Engineer
Design and implement FPGA-based signal processing for next-gen radar and sensing systems, integrating with software and hardware in a defense-focused R&D environment.
FPGA Engineer
Designs and verifies FPGA-based digital circuits for automated trading systems, develops reusable IP, and integrates hardware with software stacks using SystemVerilog/Verilog/VHDL and C++.
Microprocessor VLSI Physical Design Engineer
Design high-speed VLSI circuits for next-gen CPUs, optimizing power, performance, and area while collaborating across teams to solve complex hardware challenges.
Senior Software Engineer
Senior Software Engineer at a remote-first consulting firm building and scaling web apps, APIs, and backend services for clients across multiple stacks like Ruby on Rails, React, Node.js, Rust, Python, Java, and Go.
Lead RTL Design Engineer
Lead the RTL design and microarchitecture of an ultra-low-power SoC for edge AI/IoT, defining dataflow fabrics, memory subsystems, and interconnects using SystemVerilog and collaborating across hardware, firmware, and verification teams.