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Principal Radar Software Engineer
Company Overview Metrea delivers effects-as-a-service to national security partners across five domains and more than a dozen mission areas. These include airborne ISR, electronic warfare, secure communications, aerial…
Senior Engineer, Physical Design AI/ML
Develop AI/ML models to optimize chip design PPA and automate PDK/EDA workflows for sub-2nm nodes. Requires expertise in Python, PyTorch, physical design, and generative AI frameworks within a semiconductor R&D lab.
Senior Firmware Engineer, FPGA
Designs, implements, and maintains FPGA-based platform firmware for AI compute systems, integrating with BMC, BIOS, and hardware while ensuring reliability and scalability in CoreWeave's data centers.
Design Verification (DV) Engineer - 2027 Grads
The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technologies to drive low latency trading decisions on global markets. We build custom solutions across the…
Hardware Design Engineer - 2027 Grads
The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technologies to drive low latency trading decisions on global markets. We build custom solutions across the…
Senior Software Engineer- AI for RTL Design & Formal Verification
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the…
Senior Electrical Engineer- SDR Hardware
Design and test high-speed software-defined radio hardware for satellite communications, including FPGAs, SERDES interfaces, and RF signal chains.
FPGA Engineer
Designs, verifies, and tests FPGA-based RTL for satellite systems, collaborating with hardware, software, and DSP teams to meet performance and radiation-mitigation requirements.
ASIC Design Engineer – DSP / Analog / SerDes
Designs and develops ASICs for optical transceivers in next-gen optical modems, focusing on HDL-based digital circuit implementation, synthesis, timing analysis, and RTL verification.
Staff Frontend Engineer - Bangalore
Build and own the frontend architecture for a high-scale AI-driven coding platform, using React, TypeScript, and modern tooling to create scalable UI systems and internal tooling.
Frontend Engineer
Frontend engineer owning the architectural vision for high-scale products, using React.js, TypeScript, and modern state management to build the UI for an AI-driven software creation platform.
Senior FPGA & Firmware Engineer - SDR
Senior FPGA engineer implementing digital signal processing for software-defined radios on Zynq UltraScale+ MPSoC, using MATLAB/Simulink, VHDL/Verilog, and Xilinx Vivado in a hybrid role based in Boston or Scottsdale.
Senior Physical Design Engineer
The Senior Physical Design Engineer will manage end-to-end physical implementation of advanced VLSI designs, including floorplanning, timing closure, and signoff. The role requires expertise in PNR and industry-standard physical design tools to optimize for power, performance, and area.
Hardware - Silicon Validation Team Lead (NPU SoC)
Leads silicon validation for NPU SoC chips, ensuring system-level functionality from first silicon bring-up to performance optimization and stability. Bridges hardware (RTL/DV) and software (firmware/OS) teams with structured validation processes, debugging, and test automation.
Hardware - Silicon Validation Engineer (NPU SoC)
Validates NPU SoC hardware for FuriosaAI, ensuring first-silicon bring-up, system-level debugging, and performance optimization across AI compute components like NPU cores, CPUs, and high-speed interfaces.