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Senior Firmware Architect, RAS and Power Management
Architect and implement firmware for reliability, availability, serviceability, and power management across NVIDIA’s networking platforms, collaborating with hardware, software, and validation teams.
Early Career - RTL Design Engineer
Design and implement GPU micro-architecture in RTL using Verilog/VHDL, optimizing for power, performance, and area while collaborating with verification and physical design teams.
Lead, Software Engineer
L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers’ mission and quest for professional…
Senior Staff Software Development Engineer
Develop embedded firmware for AMD’s networking products, collaborating with hardware teams to refine silicon designs and optimize network stacks for cloud and AI systems.
Software Engineer – Hardware Development
Develops the operating system and software stack that powers custom trading hardware, integrating low-level hardware with Python, C/C++, and embedded systems.

Senior FPGA Engineer
Designs, tests, and deploys FPGA firmware for rocket avionics systems, shepherding custom digital electronics from concept through flight operations on Relativity Space's Terran R launch vehicle.
SoC FPGA Developer
Develop and verify complex SoC FPGAs for high-data-rate networking or DSP applications using VHDL, Verilog, and Xilinx tools, while collaborating on hardware/software co-design.
Embedded Software Engineer - Physical AI
Develop embedded C/C++ software and Linux platform support for AMD Adaptive SoCs and Ryzen AI Embedded processors, building computer vision, graphics, and edge AI pipelines for robotics and industrial automation.
Contract FPGA Engineer
Contract FPGA engineer designs and implements hardware logic using VHDL/Verilog and Xilinx/Intel toolchains for a UK-based product company.
Staff Design Verification Engineer, SoC and eFPGA
Staff engineer verifying next-gen eFPGA and SoC designs using UVM, SystemVerilog, and end-to-end silicon verification flows.
Concepteur Digital Design (H/F/N)
Designs digital SoC/ASIC IP blocks and subsystems for automotive electronics, writing RTL in Verilog/VHDL and guiding physical implementation and verification flows.
Design Verification Engineer- Senior / Principal
Design verification engineer to validate custom silicon for AI hardware, writing test plans and debugging RTL in UVM/C++ for complex SoCs.
Principal/Staff Design Verification Engineer
Leads a team to verify complex ASIC/SoC designs for Bitcoin mining and AI cloud hardware, using UVM, SystemVerilog, and protocol knowledge (AXI, NoC, RISC-V) to ensure silicon quality.
Senior NVM Designer
Design and verify non-volatile memory (NVM) circuits for analog AI compute-in-memory chips, including high-voltage blocks and interfaces with analog computation units.
Electrical Engineer, Embedded Systems
Design and develop embedded electronics and firmware for precision scientific instruments, microscope systems, and research tools using C/C++, Altium, and ARM Cortex.
Senior SoC Design Engineer
Senior SoC Design Engineer at NVIDIA to architect and deliver next-gen system-on-chip designs, collaborating across teams to ensure first-time-right RTL, synthesis, and validation using Verilog/SystemVerilog and AMBA protocols.
ASIC RTL Design Engineer
Design and integrate RTL for complex ASIC/SoC using Verilog/SystemVerilog, focusing on reset domain crossing, IP integration, and SoC architecture.
RTL Micro Architect Lead
Leads microarchitecture design for GPU, DSP, and AI/ML accelerators in complex SoCs, defining RTL specs and optimizing performance, power, and area.
(Sr.) ISP RTL Design Manager
Leads a team to design and implement image signal processing (ISP) hardware using Verilog/SystemVerilog/SystemC, optimizing for power and gate count while collaborating with algorithm and system teams.