Tech jobs
Job listings
Design for Test Design Engineer
Senior Principal DFT Design Engineer Location: AUSTIN Time Type: Full time Job Description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking…
Lead Software Engineer
Lead Software Engineer: Jasper R&D Location: BELO HORIZONTE Time Type: Full time Job Description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence…
Principal Design Engineer
Sr Principal Design Engineer Location: SHANGHAI Time Type: Full time Job Description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Responsibilities:…
Sr. Staff Engineer - Digital Design Verification
Senior engineer who designs and runs verification tests for low-power System-on-Chip designs used in IoT and edge-AI products, using SystemVerilog, UVM, and C/C++.
Senior Engineer, FPGA
Design and debug FPGA images for pre-silicon prototyping of ultra-low-power SoCs using Xilinx Vivado and Intel Quartus, supporting verification and software teams.
Staff Engineer - Design Verification
Design verification engineer at Ambiq Micro, Singapore, responsible for verifying low-power SoCs for IoT applications using SystemVerilog/UVM, ARM/RISC-V, and power-aware methodologies.
Hardware Engineer Intern
Intern designs FPGA/ASIC solutions for ultra-low-latency trading systems, writing and verifying RTL in SystemVerilog and bringing designs up on live hardware.
Summer 2027 Intern - Hardware Engineering
Design and verify custom silicon chips for next-generation data storage hardware, using RTL, Verilog/SystemVerilog, and digital logic while collaborating with cross-functional engineering teams.
Hardware Engineer
Design and verify custom silicon and hardware for next-generation data storage devices, collaborating across ASIC, firmware, and systems engineering teams using RTL, Verilog, and embedded C/C++.
Digital Design Verification Engineer
Build and maintain UVM/SystemVerilog testbenches to verify PCIe and memory-subsystem RTL, collaborating with architects and post-silicon teams to ensure robust, high-performance designs.
Senior TPU Design Engineer, Silicon
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
Early Career Analog Mixed-Signal Design Verification Engineer (m/f/d)
Verify next-gen power-management ICs for Apple’s PMU team, writing test plans and environments in SystemVerilog/Verilog-AMS to ensure high-quality silicon tape-outs.
FPGA Design Engineer
FPGA Design Engineer Level 2 Location: United States-Maryland-Linthicum Time Type: Full time Job Description RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE…
IC Design Exploration Intern
An intern in AMD’s Singapore design center works on cutting-edge IC design tasks like analog/digital design, verification, or post-silicon validation using EDA tools such as Cadence and Synopsys, contributing to high-speed SerDes and AI-related chips.
FPGA Developer
Experienced FPGA Developer Location: Rancho Santa Margarita, CA, us Company Description CS Group USA, a subsidiary of CS Group, is a key player in the development and certification of safety-critical systems in the…
ASIC RTL Design Engineer
Designs and verifies ASIC/SoC RTL for energy-efficient AI memory hardware, using Verilog/SystemVerilog and industry tools to optimize power, performance, and area.
Experienced Analog Mixed-Signal Design Verification Engineer (m/f/d)
Design verification engineer at Apple’s Nabern office, verifying next-gen power-management ICs using mixed-signal verification flows, hardware description languages, and analog behavioral models to ensure high-quality silicon tape-outs.