Tech jobs

AI/ML Physical Design Flow Engineer

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Leads AI/ML-driven physical design flows for semiconductor IP, optimizing RTL-to-GDS methodologies to improve performance, power, and area (PPA) and runtime across advanced nodes.

Open 81d North AmericaFull-timeLead

CPU Core Design Verification Testbench Lead

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Leads verification of high-performance RISC-V CPU cores by developing and owning testbenches, debug infrastructure, and AI-assisted verification workflows.

CPU Verification Fellow, RISC-V High-Performance Processor

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Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…

Open 81d RemoteEuropeFull-time

DFT Engineer, Automotive Robotics

Germany

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…

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Director, Customer Hardware Engineering

Open 81d RemoteEuropeFull-time

Canada

Director leading customer-facing hardware engineering at Tenstorrent, owning technical relationships with strategic customers and FAEs to translate silicon needs into RTL/verification specifications for custom AI silicon programs.

Emulation Engineer, Automotive Robotics

Germany

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…

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Full-Chip Physical Design Verification Engineer

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Full-chip physical design verification engineer ensuring manufacturable silicon for AI SoCs using DRC/LVS/ERC flows and advanced nodes (7nm–3nm).

Interconnect and Compute Architect

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Designs next-generation CPU networking architectures for AI/ML workloads, focusing on datacenter and emerging robotics/automotive applications using Ethernet, RDMA, and die-to-die interfaces.

Physical Design Engineer

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Designs and implements high-performance CPU and AI/ML chip blocks from synthesis to tapeout, optimizing power, performance, and area using advanced EDA tools and methodologies.

Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)

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Physical Design Engineer owning Die-to-Die interface implementation from RTL to GDSII for advanced-node chiplet architectures, using full PD flow (synthesis, P&R, CTS, sign-off) with Synopsys/Cadence/Mentor EDA tools and Tcl/Python automation.

Physical Design Engineer, PnR

Designs and implements high-performance AI SoC partitions from synthesis to tapeout, focusing on timing, power intent, and physical verification using Synopsys tools (Design Compiler, Fusion Compiler, IC Compiler II).

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Physical Design Engineer - STA

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Drive static timing analysis and closure for high-performance RISC-V CPUs and AI SoCs, collaborating with logic, DFT, and physical design teams using STA tools, SDC constraints, and Python/Perl/TCL scripting.

Power Architect

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Canada

A Power Architect at Tenstorrent designs and optimizes power consumption in high-performance AI compute systems, using tools like PowerArtist and Verilog, to build power-aware systems from the ground up.

Open 81d RemoteEurope, North AmericaFull-time

RISC-V CPU Microarchitecture / RTL

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…

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Open 81d APACFull-timeSenior

Senior DFT Engineer, Architecture

Japan

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…

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Open 81d North AmericaFull-timeLead

Silicon Power & Characterization Lead

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…

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SoC Physical Design Verification Engineer

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Drive full-chip physical verification signoff (DRC, LVS, ERC, PERC) for advanced-node SoCs using tools like Calibre, ICV, and Pegasus, collaborating across RTL, PD, CAD, and packaging teams at an AI chip company.

Open 81d North AmericaFull-timeSenior

Sr. Engineer, CPU RTL Design

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Designs and implements RTL for high-performance RISC-V CPUs, collaborating with DV, PD, and performance teams to meet functional, timing, and power goals.