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549 jobs
Astera Labs
5 days ago

Director, Physical Design

Open 73d APAC H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
India

Leads a team in Hyderabad to design and implement high-speed connectivity ASICs for AI infrastructure, using advanced EDA tools and flows for full-chip physical design and tapeout.

ai asic automation cad cloud +8 skills
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IMC Trading
6 days ago

Hardware Engineer

Open 68d North AmericaFull-time Licensed NL sponsor — This employer appears on the IND public register of recognised sponsors for work and highly skilled migrants. The recognition belongs to the employer and is not a commitment to sponsor this role.
United States

Design and verify custom ASICs for ultra-low-latency trading systems using SystemVerilog, C++, and Python, collaborating with hardware, software, and trading teams.

asic automation backbone bash cpp +7 skills
200 000 – 225 000 $
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IMC Trading
6 days ago

Graduate Hardware Engineer

Open 61d North AmericaFull-time Licensed NL sponsor — This employer appears on the IND public register of recognised sponsors for work and highly skilled migrants. The recognition belongs to the employer and is not a commitment to sponsor this role.
United States

Design and test low-latency hardware for high-frequency trading systems while learning algorithmic trading and collaborating with engineers and traders.

backbone cpp python rtl systemverilog +2 skills
200 000 – 200 000 $
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IMC Trading
6 days ago

Hardware Engineer Intern - Summer 2027

Open 61d North AmericaInternshipIntern Licensed NL sponsor — This employer appears on the IND public register of recognised sponsors for work and highly skilled migrants. The recognition belongs to the employer and is not a commitment to sponsor this role.
United States

Internship building hardware for a proprietary trading firm, writing RTL in Verilog/SystemVerilog and scripting in Python/C++ while learning financial markets.

backbone cpp python rtl systemverilog +2 skills
200 000 – 200 000 $
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waymo
6 days ago

ASIC Design Verification Engineer

Open 79d HybridNorth AmericaFull-time H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Designs and verifies custom silicon for autonomous vehicles, using UVM/SystemVerilog to validate hardware functionality and performance in a hybrid work environment.

ai automation cpp ethernet generative-ai +7 skills
175 000 – 215 000 $
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waymo
6 days ago

Staff SoC Design Engineer

Open 27d HybridNorth AmericaFull-timeStaff H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Design next-gen SoCs for autonomous vehicles, defining hardware specs and RTL while optimizing performance, power, and latency for Waymo’s compute platform.

ai asic automation cpp firmware +5 skills
251 000 – 310 000 $
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waymo
6 days ago

ML ASIC Design Engineer

Open 22d HybridNorth AmericaFull-time H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Designs high-performance ML ASICs for autonomous driving, translating requirements into hardware features and optimizing power, area, and performance.

asic cpp machine-learning python rtl +2 skills
175 000 – 215 000 $
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Tensordyne
6 days ago

Sr. Staff ASIC Design Engineer

North AmericaStaff
United States

Sr. Staff ASIC Design Engineer responsible for microarchitecture and RTL design of high-performance AI inference ASICs using Verilog/SystemVerilog, integrating CPU and third-party IPs, and collaborating with physical design and verification teams.

ai asic generative-ai i2c networking +3 skills
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kapta-space
6 days ago

Senior FPGA Engineer

On-siteNorth AmericaFull-timeSenior
United States

Senior FPGA Engineer leading RTL design and FPGA development for spaceborne radar systems, working with Verilog/VHDL, synthesis, place-and-route, and timing analysis on FPGA/SoC platforms.

ethernet firmware fpga git i2c +10 skills
215 000 – 250 000 $
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Lightmatter
6 days ago

Digital Architect

Open 49d North AmericaFull-time H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Digital Architect for high-speed photonic communication chips, defining digital architecture from concept through production for Lightmatter's AI data center infrastructure. The role involves architecting mixed-signal systems integrating SerDes, ADC/DAC, and photonic circuits, working closely with analog, photonic, and software teams to deliver groundbreaking optical computing products.

ai cad firmware hpc matlab +3 skills
146 000 – 222 000 $
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Lightmatter
6 days ago

Principal Digital (mixed-signal) Architect

Open 79d North AmericaFull-timePrincipal H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Principal architect designs digital circuits for high-speed photonic communication chips, defining architecture for AI data center infrastructure and collaborating with cross-functional teams.

ai cad firmware hpc matlab +3 skills
217 000 – 325 000 $
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Lightmatter
6 days ago

Sr. Design for Test (DFT) Engineer

Open 35d North AmericaFull-timeSenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
Canada

Senior engineer designing and implementing test strategies for high-performance AI ASICs, including scan insertion, ATPG, and post-silicon bring-up using advanced CMOS processes.

ai asic automation cad cmos +6 skills
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Lightmatter
6 days ago

Sr. Design for Test (DFT) Engineer

Open 35d North AmericaFull-timeSenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Designs and implements test solutions for advanced AI/photonics-based chips, working across digital, analog, and photonic logic to ensure manufacturability and bring products to market.

ai asic hpc jtag python +3 skills
154 000 – 218 000 $
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Lightmatter
6 days ago

Sr. Staff Physical Design Timing Engineer (STA)

Open 79d North AmericaFull-timeStaff H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of…

ai asic bash cmos hpc +4 skills
217 000 – 267 000 $
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Astera Labs
7 days ago

Manager, Physical Design Engineer

Open 81d On-siteNorth America H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
Canada

Manages a team of physical design engineers in Toronto to implement high-speed connectivity ASICs for AI infrastructure, using advanced EDA tools and TSMC nodes.

agentic-ai ai automation cad ethernet +5 skills
180 000 – 220 000 CAD
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Astera Labs
7 days ago

Principal Design Verification Engineer

Open 81d North AmericaPrincipal H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Principal Design Verification Engineer at Astera Labs designs and verifies advanced ASICs for AI infrastructure using SystemVerilog, UVM, and scripting languages, ensuring robust connectivity solutions for server and networking applications.

ai cpp ethernet networking pcie +5 skills
185 000 – 230 000 $
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Astera Labs
7 days ago

Principal Digital Design Engineer

Open 81d North AmericaPrincipal H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Principal Digital Design Engineer at Astera Labs designing high-performance AI connectivity silicon, owning RTL implementation through silicon bring-up for PCIe, CXL, and other protocols.

ai automation cad cmos ethernet +4 skills
185 000 – 230 000 $
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Astera Labs
7 days ago

Principal Digital Design Engineer (AI Fabric)

Open 81d North AmericaPrincipal H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Principal Digital Design Engineer at Astera Labs designing high-performance connectivity solutions for AI infrastructure, using RTL, synthesis, and advanced CMOS nodes.

ai automation cad cmos ethernet +5 skills
185 000 – 230 000 $
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Astera Labs
7 days ago

Senior ASIC Design Engineer

Open 81d MENASenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
Israel

Designs high-performance digital blocks for AI infrastructure chips, using Verilog/SystemVerilog and EDA tools to solve data bottlenecks in semiconductor connectivity solutions.

ai asic automation ethernet pcie +5 skills
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Astera Labs
7 days ago

Senior Principal Digital Design Engineer

Open 81d North AmericaPrincipal H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Senior Principal Digital Design Engineer at Astera Labs in San Jose, CA, leading architecture and RTL implementation for AI connectivity chips using PCIe, CXL, UALink, Ethernet, and DDR protocols.

ai automation cad cmos ethernet +4 skills
205 000 – 255 000 $
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