AccelerComm
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7 views last month
Design Team Leader
Open 29d HybridUKLead
United Kingdom
Cambridge, CambsHands-on team leadership role at AccelerComm in Cambridge (hybrid) guiding the design, quality, and delivery of Layer 1 IP for 5G base stations on satellites. The leader drives RTL design for ASIC/FPGA, UVM verification, timing/power optimisation, and mentors the team while shaping the technical roadmap.
Agile AI C++ FPGA Pre-sales +5 skills
12 views 3 months ago
Design Engineers
Open 99d RemoteNorth America
United States
West CoastDesign Engineer at AccelerComm develops advanced IP, system, and board solutions for 5G wireless communications, using SystemVerilog, EDA tools, and hardware optimization techniques.
Automation Confluence C++ Git Jenkins +6 skills