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Design Team Leader
Open 29d HybridUKLead
United Kingdom
Cambridge, CambsHands-on team leadership role at AccelerComm in Cambridge (hybrid) guiding the design, quality, and delivery of Layer 1 IP for 5G base stations on satellites. The leader drives RTL design for ASIC/FPGA, UVM verification, timing/power optimisation, and mentors the team while shaping the technical roadmap.
Agile AI C++ FPGA Pre-sales +5 skills