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Advanced Micro Devices, Inc

American multinational semiconductor company

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158 jobs

PNR CAD SILICON DESIGN ENGINEER

Open 34d last month38 views
India
Hyderabad-Design Center

AMD is hiring a PNR CAD Silicon Design Engineer in Hyderabad to develop and automate place-and-route flows and methodologies for next-gen CPU/GPU designs at 3nm and 2nm nodes. Day-to-day work centers on scripting flow automation (Python, TCL), driving PPA convergence with Innovus/Fusion Compiler, and collaborating with global design teams and EDA vendors.

AI Automation CAD GPU Machine Learning +2 skills

Standard Cell Design Enablement Lead

Open 33d last month10 viewsLead
ON, Markham-1CV

Lead engineer on AMD's standard cell library team, developing and supporting standard cell libraries and process characterization IP for cutting-edge AMD chips. Day to day involves coordinating external library vendors, overseeing library build/release/QA, and working with EDA tools (Synopsys/Cadence/Siemens), SPICE simulation, and Perl/Python scripting in Unix environments.

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Sr. STAFF/STAFF SILICON DESIGN ENGINEER (PCIe)

Open 33d last month18 viewsStaff
Ireland
Cork

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…

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Director -AI Driven Silicon Design

Open 34d last month8 views
United States
NY, Fishkill

Director-level role at AMD leading organization-wide adoption of AI/ML-driven methodologies across x86 core silicon development — functional verification, RTL design, and physical design. The hire sets a multi-year AI strategy, builds and leads an engineering team, and reports measurable efficiency and design-quality gains to executives.

AI Ai Enablement Data Engineering Data Pipelines Data Science +2 skills

Sr. Silicon Design Engineer

Open 34d last month33 viewsSenior
India
Bangalore-Technostar B1

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…

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Silicon Design Engineer

Open 37d last month30 viewsInternshipIntern
United Kingdom
Cambridge

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…

AI Cloud C++ Go-to-Market Python +1 skills

Staff Silicon Design Engineer

Open 37d last month9 viewsFull-timeStaff
United States
MA, Boxborough

Lead pre-silicon IP design engineer at AMD's Strategic Silicon Solutions group, guiding a design team through SoC subsystem development integrating AMD, ARM, DSP, and NOC IP. Day-to-day spans Verilog/SystemVerilog RTL design, lint/CDC/UPF power-quality checks, and supporting verification, synthesis/STA, and post-silicon bring-up.

AI Asic Firmware S3 Verilog

Lead Physical Design Engineer, Place & Route

Open 39d last month25 viewsLead
ON, Markham-1CV

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…

AI Automation Bash GPU Perl +2 skills

Summer 2027 Hardware Engineer Intern

Open 40d last month33 viewsInternshipIntern
United Kingdom
Edinburgh

A Summer 2027 hardware engineering internship at AMD in Edinburgh, UK, running full-time (hybrid or onsite) from June 1, 2027. The intern works alongside AMD experts on projects in the AI ecosystem, with desired exposure to digital logic design, RTL (VHDL/Verilog), DSP, and Xilinx FPGA tooling.

AI Java Networking Python Rtl +3 skills

Product Application Engineer - FPGA/Emulation & ACAP Compilation Tools

Open 144d last month15 views
India
Hyderabad-Sattva

Develops and supports FPGA/emulation and ACAP compilation tools for AMD's hardware platforms, collaborating with R&D and customers to improve emulation flows and prototyping methodologies.

AI Asic Db2 Embedded Systems FPGA +4 skills

Staff Digital Design Engineer

Open 144d last month23 viewsStaff
United Kingdom
Edinburgh

AMD is hiring a Staff Digital Design Engineer in Edinburgh (hybrid) to implement and optimize DSP algorithms and RTL for 200+Gbps SerDes transceivers, with a focus on power efficiency. Day-to-day work involves SystemVerilog RTL, ASIC front-end flows (lint, synthesis, STA), and collaboration with architecture, hardware, and verification teams.

AI Embedded Systems Ethernet Networking PCIe +3 skills

Silicon Design Engineer

Open 41d last month21 viewsJunior
ON, Markham-33CV

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…

AI API Asic Assembly C++ +8 skills

RTL Design Engineer

Open 44d 2 months ago13 views
ON, Markham-1CV

RTL Design Engineer at AMD in Markham, ON developing digital IP for next-gen chiplet die-to-die interconnect (UCIe, UALink) that will power future AMD CPUs, GPUs and AI hardware. Day to day: micro-architecture definition, RTL coding, area/power/performance optimization, and post-silicon debug alongside DFT, verification and physical design teams.

AI Automation Express.js Firmware PCIe +3 skills

Sr. RTL Design Engineer

Open 45d 2 months ago10 viewsSenior
United States
CA, San Jose

Designs RTL for complex digital and mixed-signal blocks on AMD's FPGA/adaptive computing silicon programs, carrying IP from RTL development through GDS implementation. Works with Verilog/SystemVerilog, UVM verification, EDA tools (Synopsys, Cadence), and scripting (Perl, Tcl, Shell, Python) in a hybrid San Jose role.

AI Automation Bash FPGA PCIe +9 skills

FPGA Design and Prototyping Engineer

Open 45d 2 months ago19 views
United States
CA, San Jose

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…

AI Ethernet Firmware FPGA PCIe +4 skills

Physical Design Engineer

Open 46d 2 months ago11 views
ON, Markham-33CV

AMD is hiring a Tile Place & Route (PnR) Lead in Markham, ON to own physical implementation of complex SoC tiles from floorplan through tapeout at advanced process nodes — driving strategy, schedule, design quality, and mentoring engineers. Core work spans floorplanning, placement, CTS, routing, timing/IR-EM closure, and flows like ICC2, Fusion Compiler, PrimeTime, RedHawk/Totem, and Calibre.

AI CAD

Sr Silicon Design Verification Engineer

Open 46d 2 months ago16 viewsSenior
United States
TX, Austin

Senior silicon design verification engineer who plans, builds, and runs verification for AMD's graphics processor IP — writing directed and constrained-random tests, debugging RTL/firmware failures, and improving UVM-based verification methodology. Core stack: SystemVerilog/UVM, Verilog, C/C++, and simulation tooling in Linux (and some Windows) environments.

AI Asic Bash C++ Firmware +6 skills

CPU Microarchitecture & Cache RTL Design Engineer

Open 46d 2 months ago15 views
United States
CO, Ft Collins

AMD's Cores team in Fort Collins, CO seeks a senior RTL design engineer to design high-performance, energy-efficient cache and routing-fabric microarchitecture for next-generation CPU cores, collaborating with architecture, physical design, verification, and DFT teams. Key tech: digital RTL design, Verilog, and cache/coherency architecture.

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RTL Design Engineer – Power Design

Open 47d 2 months ago14 views
United States
TX, Austin

An RTL Power Design Specialist on AMD's Security IP team defines IP-level power specs, sets and tracks power targets, and builds power measurement/regression flows for embedded microprocessor subsystems and hardware accelerators across AMD's client, server, graphics, and gaming SoCs. Core tech: Verilog/SystemVerilog, Python/Tcl/Perl/Ruby scripting, and ASIC power-aware design flows.

AI Asic Perl Python Ruby +3 skills

CPU Architecture and RTL Design Engineer

Open 47d 2 months ago12 views
Ireland
Dublin

Join AMD's CPU team in Dublin as a CPL (Chip Pervasive Logic) Architect/RTL Design Engineer, defining, implementing, and integrating clocking, reset, and power logic in next-generation CPU caches and cores — taking designs from concept through tapeout. Core work involves Verilog RTL, clock/power domain crossings, static timing, and static power analysis.

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