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III-V Wafer Fab Process Engineer (Lithography)
Open 63d APAC
Singapore
Position Summary The III-V Wafer Fab Process Engineer is responsible for developing, qualifying, and sustaining photolithography and etch processes used in the manufacture of III-V compound semiconductor devices,…
Acceptance Criteria Design of Experiments (DOE) FMEA Root Cause Analysis
6K – 9K SGD / mo