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Base: Central Singapore Key Responsibilities: Develop, maintain, and optimize flows for logic synthesis, formal verification, and STA , ensuring quality, accuracy, and efficiency. Develop and review module-level and…
Base: Center of Singapore Key Responsibilities: Perform logic synthesis, LEC, ECO implementation, and quality control throughout the IC development process. Work closely with front-end design teams to develop and…
A junior engineer on a chip design team develops AI-based image enhancement algorithms (super-resolution, denoising, AI ISP) and audio AI (speech recognition, noise reduction), then deploys and optimizes them on NPU platforms, designs C models for AI hardware acceleration, and supports customers with NPU toolchains. Requires 2+ years in AI algorithms and NPU deployment.
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