HPR (Hyannis Port Research)
Open positions
Software Engineer II
Develop and debug high-performance C applications for ultra-low latency electronic trading infrastructure on multi-core Linux systems, collaborating with tier-1 financial institution customers.
Senior Software Engineer
Develops high-performance, low-latency trading infrastructure in C for financial institutions, focusing on multi-core Linux systems and network data processing.
Senior FPGA Design Engineer
Designs and optimizes ultra-low-latency FPGA hardware for electronic trading systems used by top-tier financial institutions.
Senior Design Verification Engineer
Designs, tests, and maintains high-performance FPGA/ASIC systems for ultra-low-latency trading infrastructure, using SystemVerilog for verification and advanced simulation tools.
FPGA Design Engineer II
FPGA Design Engineer responsible for RTL design, development, and optimization of high-performance, ultra-low latency FPGA compute and networking systems for electronic trading infrastructure, primarily using SystemVerilog/VHDL.