慧榮科技股份有限公司_SMI
Open positions
類比IC設計工程師(DRAM IO)-竹北
1.IO Design. 2.DDR Analog. 3.DDR RX/TX design. 4.擁有DRAM IO設計經驗，有DDR5以上經驗者尤佳。
數位IC設計工程師II-新店
1. Maintain USB3.2/SATA/PCIe MAC Mass Production ICs and issue tracking/debugging 2. Integrate USB3.2/USB4/SATA/PCIe related IPs 3. Analysis, design and verify USB3.2/USB4/SATA/PCIe clk_rst, DMA datapath and peripheral…
數位IC設計工程師I-新店
1. Digital IC design 2. Low power design 3. RTL coding/simulation 4. SoC integration 5. FPGA/IC verification
【116年研發替代役】類比IC設計工程師(SerDes)-新店
1. PCIe/MPHY high-speed PHY mixed signal design：TX(FFE, driver), RX(CTLE, DFE, CDR), PLL(LC-tank VCO), DAC/ADC, Bandgap, LDO, POR, IO/ESD, … etc. 2. Communicate with digital, layout and system engineer. 3. Design…
Analog Layout工程師-新店
Serdes/AIP/IO layout
類比IC設計工程師(SerDes)-新店
1. High-speed PHY TX(FFE, driver), RX(CTLE, DFE, CDR) and PLL design。 2. Communicate with digital, layout and system engineer。 3. Design verification/documentation/supporting。 4. PAM4 circuit design experience is a plus。
高速介面Serdes PHY數位IC設計工程師-新店
1. RTL/Digital circuit design, synthesis, and simulation/verification. 2. FPGA/IC verification 3. PCIe PHY digital design & verification.
數位IC設計工程師VI-新店
1. Digital IC design 2. ASIC front-end design flow development 3. Familiar DDRPHY / PCIEPHY / high-speed IP synthesis and DFT integration 4. AI-assisted workflow to improve design flow report analysis 5. Familiar SDC…
數位IC設計工程師V-新店
1. RTL/Digital circuit design, synthesis, and simulation/verification. 2. SOC security IP, DDR IP, Ethernet IP integration and design verification / FPGA emulation. 3. FPGA synthesis, verification. 4. SOC architecture…
【116年研發替代役】數位IC設計工程師-竹北
1. RTL/Digital circuit design, synthesis, and simulation/verification. 2. FPGA synthesis, verification. 3. Chip integration, algorithm implementation, and interface design. 4. Generate test pattern.
【116年研發替代役】類比IC設計工程師(Integration)-竹北
1. Analog ip top integrated, including project of SSD/UFS/eMMC/SD … 2. Basic analog circuit design concept about LDO/DCDC/BANDGAP/Voltage Detector or PLL/ADC…etc. 3. Help to do fail sample analysis & IC measurement.
數位IC整合工程師-竹北
1.Integrate digital IPs and subsystems into SoC/top-level design. 2.Perform RTL integration, hierarchy planning, and interface connection. 3.Collaborate with Digital Design, Verification, DFT, APR, and Architecture
Physical Design Engineer(APR)-Zhubei
APR Physical design ( P&R ), including floorplan, power plan, physical synthesis, clock tree synthesis, routing, DRC/LVS to tapeout.
數位IC設計工程師(eMMC/UFS)-竹北
1.Perform RTL design, digital circuit design, synthesis, and simulation/verification for eMMC/UFS-related IP and controller development. 2.Participate in ASIC design and implementation for eMMC/UFS storage controller…
類比IC設計工程師(Integration)-竹北
1. Analog ip top integrated, including project of SSD/UFS/eMMC/SD … 2. Basic analog circuit design concept about LDO/DCDC/BANDGAP/Voltage Detector or PLL/ADC…etc. 3. Help to do fail sample analysis & IC measurement.
類比IC設計工程師(PLL)-竹北
1. Design, simulate, and verify analog IP for integrated circuit products. 2. Collaborate with cross-functional teams to support product development, silicon validation, and performance optimization. 3. Hands-on…
PMIC Analog Design Engineer-Zhubei
1.Power IC design 2.DC-DC converter design