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Provides onsite IT end-user support across indie's global offices: onboarding/offboarding, break-fix, endpoint management (Windows/macOS via Intune, Autopilot, Automox), and identity/access admin in Active Directory and Entra ID. Also supports Microsoft 365, Teams Rooms, and Atlassian (Jira/Confluence).
Imagine being part of a team that’s redefining the future of mobility—where your ideas don’t just sit in a lab but power next-generation technology. At indie, we are developing cutting-edge semiconductors, photonics,…
Digital IC Design Engineer at indie Semiconductor in Aliso Viejo, CA, designing, integrating, and verifying digital IP (MCU and security) for System-on-Chip solutions serving the automotive ADAS market. Day-to-day work spans system architecture, RTL (Verilog) implementation, pre-silicon verification, and supporting productization using Arm Cortex-based designs and Cadence front-end tools.
Designs and verifies RTL for digital IP blocks and builds FPGA-based pre-silicon prototyping platforms for automotive ADAS SoCs at indie Semiconductor. Day to day: IP integration and benchmarking, glue logic and clocking, hw/sw partitioning, and silicon bring-up using Verilog, Vivado, C/Python, and Git.
Designs, optimizes, and verifies embedded DSP firmware for automotive ADAS SoCs at indie Semiconductor in Córdoba, Argentina — building FPGA and pre-silicon tests, mapping neural-network models onto hardware accelerators, and supporting silicon bring-up using Embedded C, Assembly, and AI coding assistants.
Designs and develops camera, vision, and imaging firmware and embedded applications on indie's Camera Video Processor products, customizing solutions for automotive customers and supporting them through the development lifecycle. Core stack: embedded C/C++, Python, RTOS/Linux, and image/video processing.
Design Verification Engineer at indie builds and executes verification strategies for next-gen automotive camera processors using SystemVerilog, UVM, and C/C++.
At indie Semiconductor, this engineer develops, validates, and releases test programs for mixed-signal automotive chips on the Advantest V93000/SmarTest 8 ATE platform across wafer probe, final test, and silicon bring-up. They also modernize test infrastructure with CI/CD pipelines, Git workflows, and Docker-based automation using Python and Java.
Designs, implements, and validates system-level firmware and embedded applications on multi-processor SoCs for indie's automotive camera/radar sensing chips — integrating image/video processing, supporting system bring-up, and building developer tools. Core stack is C in RTOS environments with Python for scripting.
Senior RF IC Design Validation Engineer in Nuremberg tests and characterizes mmWave radar chips for automotive and industrial markets, using lab equipment and automation scripts.
Engineer semiconductors and photonics for mobility and sensing systems, designing tests, automating production, and analyzing reliability to improve product performance and yield.
Leads cross-functional semiconductor program delivery at indie, coordinating chip/radar development from architecture through tape-out, validation and production ramp. Requires an ASIC/SoC or embedded systems background plus strong program management skills (PMI/IPMA), with automotive experience a plus.
Senior engineer who owns the security architecture and secure implementation of firmware on indie's automotive SoCs: performing threat analysis (TARA), writing testable security requirements, and developing embedded C applications in RTOS environments. Core stack includes applied cryptography (secure boot, key management), hardware security blocks (HSMs, OTP), plus Python and OpenSSL tooling for p
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