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About OLIX AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry…
Owns and optimizes the CI/CD pipeline for an AI accelerator’s compiler, runtime, and simulator, ensuring fast feedback, reliability, and cost-efficient compute for hardware-in-the-loop tests.
Own and scale the CI/CD, build, and test pipelines for an AI hardware accelerator stack, ensuring fast, reliable, and cost-efficient validation across simulation and hardware-in-the-loop environments.
Leads laser architecture for a hardware startup building next-gen semiconductor accelerators, shaping III-V device design and long-term roadmaps while collaborating with cross-functional teams on system-level performance and reliability.
Build and extend the distributed inference stack for OLIX’s DX-1 accelerator, connecting PyTorch/JAX to the hardware and optimizing serving performance at rack scale.
Design and optimize high-density optical interconnects and co-packaged optics for AI hardware, focusing on scalable manufacturing, alignment, and yield for next-gen accelerators.
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