Retym
Developing coherent DSP silicon for AI data center infrastructure.
Company facts
- Founded
- 2021
- Employees
- 150
- Headquarters
- United States
- Type
- Private
- Funding
- Series D · $182M · 2025
Open positions
VLSI Design Engineer
VLSI Design Engineer responsible for designing cutting-edge communication systems from scratch, including micro-architecture definition, RTL coding in Verilog/SystemVerilog, synthesis, timing analysis, and PPA optimization, collaborating closely with verification, DFT, and physical design teams.
System Integration Engineer
Hands-on system integration engineer at Retym (Ramat Gan, fully on-site) who brings up and validates PCBs, EVBs, and optical modules with customer platforms — debugging silicon-to-system issues, analyzing BER/signal integrity in the lab, and building Python/MATLAB test automation. Requires a B.Sc. in EE and 6+ years of hardware/system validation experience.
VLSI Design Engineer
VLSI Design Engineer/Micro-architect responsible for designing cutting-edge communication systems from scratch using ASIC/FPGA with Verilog/SystemVerilog.