SVENTL ASIA PACIFIC PTE. LTD.

The Physical Design Engineer II is responsible for the end-to-end physical implementation of semiconductor designs, including netlist to GDSII, timing signoff, and floor planning. The role requires expertise in PnR tools like Synopsys ICC/ICC2 or Cadence Innovus and experience with advanced process nodes.

tcl

3 days ago

Physical Design Engineer

Open 53d APAC

Singapore

The Physical Design Engineer is responsible for the end-to-end implementation of chip designs, from netlist to GDSII, including floor planning, timing signoff, and clock tree synthesis. The role requires expertise in industry-standard EDA tools like Synopsys ICC/ICC2 or Cadence Innovus and experience with advanced process nodes.

tcl

SVENTL ASIA PACIFIC PTE. LTD.

3 days ago

ATE Test Engineer

APAC

Singapore

ATE Test Engineer responsible for preparing production and qualification test packages (hardware/software) for CMOS ICs, ensuring transfer to test sites, and supporting debug/buyoff, primarily using Advantest V93k or J750 platforms.

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SVENTL ASIA PACIFIC PTE. LTD.

3 days ago

Design Verification Engineer

APAC

Singapore

The Design Verification Engineer will develop verification environments, test plans, and perform functional RTL testing at the IP and SoC levels. The role requires expertise in ASIC verification methodologies, SystemVerilog, and various communication protocols.

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Physical Design Engineer II

Physical Design Engineer

ATE Test Engineer

Design Verification Engineer

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