英屬蓋曼群島商譜瑞科技股份有限公司台灣分公司
Open positions
2 jobs
3 views 2 months ago
Sr. ASIC Design Engineer(竹北)
APACSenior
Taiwan
Zhubei City, Hsinchu County1. Architect a major block of an ASIC and write a microarchitecture specification (MAS) for the block 2. Collaborate with other team members to integrate the block with the full chip 3. Use Verilog to design and System…
FPGA Verilog
1 views 2 months ago
Sr. ASIC Design Engineer(台北)
APACSenior
Taiwan
Neihu District, Taipei City1. Architect a block of an ASIC and write a microarchitecture specification (MAS) for the block 2. Collaborate with other team members to integrate the block with the full chip 3. Use Verilog to design and System…
FPGA Verilog