AI Server-CPLD/FPGA Engineer工程師 (土城)

產品線: Server產品
1.Familiarity with VHDL/Verilog coding and FPGA/CPLD design flow is a must
2.Familiarity with Lattice/Altera/Xilinx EDA design tool.
3.Familiarity with FPGA/CPLD design in server application and multiple bus protocols including I2C / power sequence / SPI / LPC / SGPIO / I2C switch/ UART / PWM / eSPI
4.Strong HW and x86 architecture knowledge is a plus.
5.Fluent English written and verbal communication skills.
6.Integration and test experience
7. Highly self-motivated, able to work independently in a lab environment.