Analog layout designer (Graduate)
Summary
Entry-level analog layout engineer at Retym in Yerevan, working on high-end ADC/DAC chip layouts for optical communication in advanced TSMC process nodes. Day to day involves analog layout work using Mentor and Cadence tools with DRC/LVS/ERC flows.
FFor an exciting well-funded start-up, we are looking for entry level layout engineers.
You will be part of the team which develops high end ADC/DAC in an advanced process for optical communication.
Requirements
Minimum Qualifications
Experience of 1+ years in advanced tech nodes (3n up to 16n TSMC)
This experience must include:
· Good understanding of schematic flow
· Strong understanding of:
o CMOS device physics (basic level)
o Analog layout fundamentals, matching and parasitic sensitivity
· Solid knowledge of:
o DRC, LVS, ERC flows
o Foundry PDK usage
· Understanding of high-speed, low noise layout requirements
· Highly motivated
· Learning abilities
· Good communication skills in English
· Experience in both Mentor and Cadence tools is an advantage