ASIC Design Engineer_HPI

Key Responsibilities:
• Define the ASIC/SoC design MAS
• Verilog HDL coding for Switch/Hub Controller
• Handling mass-production related design tasks

Qualifications:
• Familiar with silicon front end design flow
• Experience on using Verilog/System Verilog simulator
• Good understanding on script using Perl and Tcl
• Knowledge on PCIe and USB protocol is a plus
• Knowledge on DFT/ATPG is a plus

Requirements

學歷：大學、碩士