ASIC DV Engineer, Simulation Acceleration and Hybrid Verification

Meta is hiring an ASIC Verification Engineer with background in Simulation Acceleration using Emulation and Hybrid Platforms within the Infrastructure organization. We are looking for individuals with experience in Simulation Acceleration and Emulation to build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer, you will be part of a dynamic team working with experienced engineers across the industry, focused on developing innovative ASIC solutions for Facebook’s data center applications. You will be responsible for the verification closure of a sub-system or SoC from test-planning, Hybrid test bench development to verification closure. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.