ASIC Physical Design Engineer
Summary
Designs and implements advanced integrated circuits (100–400M gates, 7nm–2nm) at Broadcom, running the full RTL-to-GDS physical design flow — synthesis, placement, clock tree synthesis, routing, physical/formal verification, and timing analysis — using Synopsys, Cadence, and Siemens EDA tools plus UNIX/Linux scripting to automate workflows, applying GPU/CPU/DSP architecture knowledge.
Company Overview
Broadcom Inc. is a global technology leader designing and supplying semiconductor and infrastructure software solutions. Its products serve data center, networking, software, broadband, wireless, storage, and industrial markets. More info at www.broadcom.com.
Job Summary
Design and implement advanced integrated circuits using cutting-edge process technologies. Manage full RTL to GDS flow and apply expertise in GPU/CPU/DSP architectures to deliver high-performance semiconductor solutions.
Responsibilities
- Utilize commercial and in-house EDA tools (e.g., Synopsys, Cadence, Siemens) to design and implement integrated circuits ranging from 100 to 400 million gates in 7nm to 2nm process technologies.
- Manage the complete RTL to GDS or Gates to GDS flow, including RTL synthesis, placement, clock tree synthesis, detailed routing, physical verification, formal verification, and timing analysis to ensure design integrity and performance.
- Apply in-depth knowledge of GPU, CPU, and DSP architectures and algorithms to optimize physical design implementation techniques.
- Use UNIX/Linux operating systems and scripting languages to automate design tasks and improve workflow efficiency.
Required competencies and certifications
- Degree, Masters, or PhD in Electrical, Electronics, or Computer Engineering.
- Minimum of 8 years of experience in integrated circuit design or related semiconductor fields.