C Model / RTL Co-Simulation and Verification Engineer

【Job Summary】
We are seeking an experienced engineer to develop and maintain a co-simulation environment for C models and RTL designs. The candidate will be responsible for building a framework that enables C model and RTL co-simulation, performing cycle-level profiling and analysis, implementing C models, and verifying functional and numerical correctness between C models and RTL.
The ideal candidate should have strong knowledge of hardware architecture, C/C++ programming, RTL simulation, and bit-true verification methodologies.
【Key Responsibilities】
1. Build and maintain a co-simulation environment that integrates C/C++ models with RTL simulations.
2. Develop infrastructure to enable communication, synchronization, and data exchange between C models and RTL.
3. Profile RTL execution cycles and analyze hardware performance using the co-simulation environment.
4. Develop and implement C/C++ models based on hardware architecture and design specifications.
5. Develop cycle-aware or cycle-accurate C models when required.
6. Perform bit-true verification between C models and RTL implementations.
7. Develop automated comparison mechanisms for intermediate and final results between C models and RTL.
8. Identify, analyze, and debug functional mismatches, numerical differences, timing issues, and synchronization problems between C models and RTL.
9. Work closely with architecture, RTL design, and verification teams to improve design correctness and performance.
10. Develop regression tests, test cases, and automated verification flows.
11. Improve the efficiency, usability, and scalability of the co-simulation and verification environment.
12. Analyze RTL performance bottlenecks based on cycle profiling results and provide optimization recommendations.
13. Create technical documentation for the co-simulation environment, verification methodology, and performance analysis.