CPU Design, Senior/Staff Engineer
Description
CPU Design, Senior/Staff Engineer
Job Description
- Expertise in power delivery networks (PDNs), signal integrity, and electromigration (EM) analysis, Codesign Bump planning
- Experience in Power & Signal Integrity (IR, EM) analysis on application processors
- Understanding of power integrity concepts, methodologies
- Provide feedback and improvement suggestions to stakeholders to solve EM/IR
- Support SoC in MCU Subsystem from Technical Feasibility Evaluation phase to post-Silicon debug phase
Job Requirements
- Bachelor/Master’s Degree in Electrical/Computer Engineering
- With relevant years of experience in similar industry preferred
- Experience handling challenges related with High-Speed CPU ARM Core Subsystem is a PLUS
- Strong experience with Voltus or Apache Redhawk
- Cross-site working experience is a PLUS
By sending us your personal data and curriculum vitae (CV), you are deemed to consent to PERSOL Singapore Pte Ltd ("PERSOL") and its local and overseas subsidiaries and affiliates to collect, use and disclose your personal data to prospective employers/companies based in any country for purposes of evaluating suitability for employment, conducting reference checks, administering employment related services, complying with Government’s health advisories and such other purposes stated in our Privacy Policy.
PERSOL Singapore Pte Ltd • UEN No. 200007268E • EA License No. 01C4394 •EA Registration No. R23117785 (Lok Ding Hann)
By sending us your personal data and curriculum vitae (CV), you are deemed to consent to PERSOL Singapore Pte Ltd and its affiliates to collect, use and disclose your personal data for the purposes set out in the Privacy Policy available at https://www.persolsingapore.com/policies. You acknowledge that you have read, understood, and agree with the Privacy Policy.