<Data center>ASIC SOC Integrator

- Data Center related IP integration , from synthesis DFT to GDS deliver
- Advance Process Node Chip integration from Synthesis to TapeOut including timing closure

Requirements

1. Cell base IC design knowledge and experience
2. Digital IC design EDA tool and flow development experience.
3. Basic RTL design experience and Timing / CTS / Physical concept

Advance : one of the following experience
-Advanced node sign-off and silicon tapeout experience
-SOC IC IP / BUS , clock / reset structure integration experience
-DFT / mBist planning and integration experience
-Cross-national collaboration experience
Education: Master's Degree