Design Engineer_High-Performance Processor

1. ARM CPU subsystem platform design & integration
2. CPU post-silicon issue resolving

Requirements

1. RTL design for specific CPU subsystem features
2. RTL sign-off including Spyglass-Lint, Spyglass-DFT, CCD, CCD check, etc.
3. RTL simulation issue resolving
4. Provide design timing constraint (sdc) and power domain information
5. CPU post-silicon issue resolving
Education: Master's Degree