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We are seeking a highly skilled Design Verification Architect to join our dynamic team. The ideal candidate will have extensive experience in design verification methodologies and will be responsible for ensuring the quality and functionality of complex systems-on-chip (SoCs). As a Design Verification Architect, you will play a critical role in developing and implementing verification strategies that ensure our products meet the highest standards of performance and reliability.
Key Responsibilities:
- Develop and execute comprehensive verification plans for SoC designs, utilizing advanced methodologies such as UVM and SystemVerilog.
- Collaborate with design engineers to understand design specifications and requirements, ensuring that all aspects of the design are thoroughly verified.
- Implement coverage closure techniques to ensure that all functional and corner cases are tested.
- Lead the verification team in the development of testbenches and verification environments, ensuring adherence to best practices and industry standards.
- Conduct power-aware verification to assess the impact of power management strategies on design performance.
- Analyze and report on verification results, providing insights and recommendations for design improvements.
- Stay updated with the latest trends and technologies in design verification and contribute to continuous improvement initiatives within the team.
Required Skills:
- Strong expertise in SystemVerilog and UVM.
- Proficiency in SVA and coverage closure techniques.
- Experience with verification strategy development and implementation.
- Knowledge of power-aware verification methodologies.
- Familiarity with various protocols and SoC verification processes.
- Excellent problem-solving skills and attention to detail.
- Strong communication and teamwork abilities.
If you are passionate about design verification and are looking for an opportunity to make a significant impact in a fast-paced environment, we encourage you to apply for this exciting role.
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