Digital Design Engineer

Аbout GlobalFoundries

GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit .

Responsibilities

• Develop, document, and maintain RTL (SystemVerilog/Verilog) for digital subsystems within the CPO product, including control logic, register interfaces, link management, and DFT structures.

• Collaborate with architecture, analog/mixed-signal, and photonics teams to define digital interfaces and control schemes for co-packaged optical modules.

• Own micro-architecture specifications, design reviews, and integration of digital IP into the top-level SoC.

• Drive synthesis, timing closure, CDC, lint, and low-power (UPF) sign-off in coordination with the physical design team.

• Perform FPGA prototyping and testing of digital subsystems to validate functionality, accelerate pre-silicon software bring-up, and de-risk RTL ahead of tape-out.

• Develop and execute UVM-based testing, including building reusable verification components, writing constrained-random tests, and driving functional and code coverage closure.

• Support verification efforts by collaborating with the DV team on testbench development, coverage closure, and debug.

• Participate in tape-out readiness activities, including ECO planning, gate-level simulation, and post-silicon bring-up support.

• Contribute to design methodology, reuse strategy, and quality improvements across the team.

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.

• 1+ years of experience in digital RTL design using SystemVerilog/Verilog.

• Solid understanding of digital design fundamentals: synchronous design, CDC, FSMs, pipelining, and low-power techniques.

• Hands-on experience with industry EDA tools (synthesis, lint, CDC, simulation).

• Familiarity with scripting (Python, TCL, Perl) for design automation.

• Strong problem-solving skills and ability to work in a cross-functional team.

Preferred Qualifications

• Experience with high-speed serial interfaces (SerDes, PCIe, Ethernet, CXL) or optical link control.

• Exposure to silicon photonics, co-packaged optics, or advanced packaging products.

• Experience with ARM-based SoC integration, AMBA protocols (AXI/AHB/APB), and standard IP integration flows.

• Prior tape-out experience on advanced process nodes.

• Knowledge of UPF/low-power flows and DFT (scan, MBIST, boundary scan).

We Offer

• Base Salary

• Equity

• Annual Bonus Plan

• Medical Insurance