Director Silicon Logical Design
Posted Updated 2
views
Summary
Lead and scale Axelera AI's silicon logical design team, translating AI chip architecture into RTL and owning logical design from concept through tape-out, including block/top-level integration, design methodology and quality practices, and support for silicon bring-up and debug. Core stack: SystemVerilog/Verilog RTL and large-scale SoC integration.
You will lead and scale digital design across RTL, integration, and methodology. You will translate architecture into RTL, own logical design through tape-out, coordinate with verification and physical design, enforce quality practices, support silicon bring-up, and develop engineers.
Responsibilities
- Lead and grow the silicon logical design team across RTL, integration, and methodology
- Translate system and micro-architecture specifications into RTL implementations
- Own end-to-end logical design execution from concept through tape-out
- Partner with architecture, verification, physical design, DFT, software, and product functions
- Define and enforce RTL quality, coding, reuse, and design-review practices
- Oversee block-level and top-level integration against performance, power, area, and schedule targets
- Support bring-up, debug, silicon validation, and root-cause analysis
- Contribute to technology roadmap planning and IP strategy
- Mentor and develop engineers
Requirements
- Extensive digital or logical design experience for complex SoCs with multiple tape-outs
- Ability to lead and grow silicon design teams
- Expertise in RTL and micro-architecture development using SystemVerilog or Verilog
- Experience with large-scale SoC integration including CPUs, accelerators, memory subsystems, and interconnects
- Understanding of performance, power, and area trade-offs in advanced process nodes
- Experience working with verification and physical design teams to achieve functional and timing closure
- Communication skills
Benefits
- Pension plan
- Employee insurances
- Company shares